23 May 2024, 09:57 | #4681 |
Registered User
Join Date: Jan 2010
Location: >
Posts: 2,952
|
Are we getting A.I’d ?!
|
23 May 2024, 10:11 | #4682 | |
Registered User
Join Date: Apr 2017
Location: France
Posts: 652
|
Quote:
VGA is 1987, the year of the A2000 yeah, so the advance of the Amiga was lost at this point. The real 256 colours mode was the definitive "killer PC application". Not to mention that Apple owned the laser printers market (they built it, the LaserWriter is 1985). |
|
23 May 2024, 13:12 | #4683 | |
Registered User
Join Date: May 2017
Location: Munich/Bavaria
Posts: 2,426
|
Quote:
The rumors made 128 colors out of this 7 planes but it is actually your 6 low resolution planes with max 64 colors in EHB plus one independent b/w HiRES plane with its own DAC. (still a very good Idea for A2000 A3000 type of computers in the late 80s) Later on this method could have been expanded to support chunky pixels and colour (with an additional CLUT for 8bit - no CLUT needed for 16bit) ... that's when we end up with the same functionality at my "Bypass" would provide. Last edited by Gorf; 23 May 2024 at 13:43. |
|
23 May 2024, 13:39 | #4684 | ||
Registered User
Join Date: May 2017
Location: Munich/Bavaria
Posts: 2,426
|
Quote:
Quote:
Fast DRAM of that time was rated "70ns" or "60ns", which leads to a total roundtrip time of 120-140 ns, which is equivalent to a frequency of 7-8 MHz Yes: DRAM really was THAT slow. Even with static page oder static column tricks and interleaving banks of DRAM chips the best transfer rates for long bursts would be around 50 MB/s (and much less for single random accesses) |
||
23 May 2024, 13:53 | #4685 | |
Registered User
Join Date: Apr 2017
Location: France
Posts: 652
|
Quote:
Of course the other question would be to know that the competition will release that in 1987 but it's another debate. I would really love to join someone of the original team who can definitively shed light on what was planned for Ranger. |
|
23 May 2024, 14:11 | #4686 | |
Registered User
Join Date: May 2017
Location: Munich/Bavaria
Posts: 2,426
|
Quote:
Yes sure, this would be possible, but you need an additional CLUT and you need a way to write your colour information to the CLUT registers ... or you decide to use a fixed 256-colour-palette. since the OCS/ECS already gives you quite good colour at low resolutions, I would assume Ranger was meant to add a monochrome 1024 pixel-wide mode, that one would most likely display on a second monitor. So you would have e.g. your cheap TV-set hooked up for games and your monochrome monitor for high-res productivity applications. And like on the C128 you would be able to have both displays running simultaneously and have e.g. a raytracer with your wireframe representation on the monochrome display and the rendering on the colour TV. |
|
23 May 2024, 14:17 | #4687 | |
Registered User
Join Date: Aug 2020
Location: Sydney/Australia
Posts: 1,050
|
Quote:
1987 Mac II models: 256 KB VRAM, 640×480p 16 color and 512×384p 256 colors. 512 KB VRAM, 640×480p 256-color. A2000 with ECS in 1987 would be okay for WYSIWYG word processors and DTP, but it's not the leader. 32-bit Chip RAM via DRAM chips Denise+ (2X) without Lisa's "double pump"(4X) would have supported 4 bitplanes 640x480p, 32-bit wide sprites, 4096 color palette and 320x200/256p 8 bitplanes (256 colors). Agnus would need to be modified for 8 bitplanes aware. It avoids the difficulty of Lisa's 24-bit palette AAA backport. Lisa's 32-bit "double pump" (28MB/s) supports 640 × 480p 256 colors which is entry-level SVGA and the 24-bit color palette is above the mandatory SVGA's 18-bit palette. It doesn't need to be an extreme upgrade with VRAM. Last edited by hammer; 23 May 2024 at 14:26. |
|
23 May 2024, 14:27 | #4688 | |
Registered User
Join Date: May 2017
Location: Munich/Bavaria
Posts: 2,426
|
Quote:
Jay Miner was actually predicting exactly this (16bit colour) for a 1990 Amiga ... that would never come. |
|
23 May 2024, 14:47 | #4689 | ||
Registered User
Join Date: Aug 2020
Location: Sydney/Australia
Posts: 1,050
|
Quote:
Quote:
Tseng ET4000/W32i uses Fast Page DRAM(e.g. 70 ns), a memory clock of 50 Mhz, core of 86 Mhz e.g. https://www.vgamuseum.info/index.php...ng-et4000-w32i 60 ns translates into 16.6 Mhz. 70 ns translates into 14.2 Mhz. For 70 ns, 14.2 Mhz effective x 3 cycle access needs a 42.6 Mhz memory bus which Tseng ET4000/W32i's 50 Mhz memory clock covers. 14.2 Mhz effective x 32-bit bus is 56.8 MB/s. ------- 3DO has its zealots. [ Show youtube player ] 3DO has its OpenLara port. Software sells the hardware... 3DO missed it. Last edited by hammer; 23 May 2024 at 15:39. |
||
23 May 2024, 15:33 | #4690 | |
Registered User
Join Date: Aug 2020
Location: Sydney/Australia
Posts: 1,050
|
Quote:
|
|
23 May 2024, 15:35 | #4691 | |||
Registered User
Join Date: May 2017
Location: Munich/Bavaria
Posts: 2,426
|
Quote:
Whatever they mean by "effective memory Clock", they seem to have mixed up things on this page. Tseng claims nothing alike in the original documents: https://web.archive.org/web/20170228.../502285_DS.pdf Quote:
The numbers are the "random access time". That is how fast the DRAM chip will put a stored value at the data line after it is told the address. But you need to wait the same time again, before you can ask for the next address. (only when the next address is in the same column it can be much faster --> DoubleCAS) Hence the "roundtrip time" is what you need to calculate the max frequency And that is usually twice the access time! So 60ns chips do have a roundtrip time of 120ns. Quote:
54.6 MB/s @ 1024x768x8, 72Hz so nowhere near your claims of 200 MB/s Last edited by Gorf; 23 May 2024 at 18:14. |
|||
23 May 2024, 15:48 | #4692 | |
Registered User
Join Date: Aug 2020
Location: Sydney/Australia
Posts: 1,050
|
Quote:
--------------------------------- https://web.archive.org/web/20170228.../502285_DS.pdf ET4000W32i has memory interleave page 13. Tseng Labs claims up to 70 percent performance increase instead of CPU's memory interleave of 20 to 30 percent. Tseng Labs claims VRAM-like performance. Pixel workload is sequential in nature. Page 15, Tseng Labs claims ATC can process 16-bit of display data at a rate of 50Mhz and 8-bit pixel data at a rate of 86 Mhz. 3DO VRAM has 20 ns access time which translates to 50 Mhz, hence 200 MB/s https://3dodev.com/_media/documentat...l_guide_us.pdf 20 ns VRAM claim for 3DO. 3DO has two discrete buses i.e. 80 ns FP DRAM 32-bit wide and 20 ns VRAM dual 16-bit port. FP DRAM can't be used for frame buffer. Last edited by hammer; 23 May 2024 at 16:39. |
|
23 May 2024, 17:57 | #4693 | |
Registered User
Join Date: May 2017
Location: Munich/Bavaria
Posts: 2,426
|
Quote:
This timing ignores the time you need to setup a line for the serial output. And of course this access is restricted to sequential reads: so technically this behavior is no RAM as it provides no Random Access. (we could call it LAM for Linear Access Memory) But yes: VRAM does have a very high max throughput within these restrictions - that is why it was used in so many video cards and consoles. One additional drawback of VRAM is the need for twice as many data pins per chip and therefore twice as many traces on the board. So with almost the same number of traces and pins you can have a 64bit wide DRAM instead of a 32bit wide VRAM configuration. And that's why VRAM died with the appearance of EDO-RAM and SDRAM. Last edited by Gorf; 23 May 2024 at 18:12. |
|
23 May 2024, 19:54 | #4694 |
Registered User
Join Date: Jan 2023
Location: Toronto
Posts: 419
|
Yes, this is the single factor that would have made this thread moot. The original team prioritized over everything else and Jay Miner having better health would to me have changed everything and most likely led to another Amiga revolution around 1990-ish.
|
23 May 2024, 20:43 | #4695 | |
Registered User
Join Date: Apr 2017
Location: France
Posts: 652
|
Quote:
The other factor is the bleed of engineers following Jack Tramiel departure in 1985. Among them, Shiraz Shivji who seems to be a second Jay Miner judging by what he managed to do at Atari. The clash with Jack was definitely the start of the end for Commodore. Not that Jack should have stay but how is departure happened was a definite shockwave for the company and so probably for the computers industry as we know it today. |
|
23 May 2024, 21:40 | #4696 |
Registered User
Join Date: Aug 2013
Location: Marseille / France
Posts: 1,517
|
A second Jay Miner ? He made the Atari ST
|
23 May 2024, 22:04 | #4697 |
Registered User
Join Date: Apr 2017
Location: France
Posts: 652
|
Last edited by TEG; 23 May 2024 at 22:13. |
23 May 2024, 22:42 | #4698 |
Rumpig
Join Date: Aug 2006
Location: The bottom of the bottle
Age: 93
Posts: 254
|
The simple fact of the matter is that commodore was mismanaged. Does not matter what sort of statistics and other bullshit you bring up, At the end of the day those in charge dropped the bundle and fucked up.
|
23 May 2024, 23:27 | #4699 |
Registered User
Join Date: Apr 2017
Location: France
Posts: 652
|
Yeah but that's seeing the world in B&W. Sometime the day can be very very messy and chances to deliver the bundle being near zero. So the discussion to try to evaluate how it was possible to success.
|
24 May 2024, 04:31 | #4700 |
Registered User
Join Date: Dec 2015
Location: USA
Posts: 2,972
|
They should have incorporated a commercial butter churner into the A1200.
The Milky FJ55C Electric butter churn is a high-quality, very durable unit that is suitable for commercial use. It is ideal for small to medium farms and butter making businesses. This unit has a capacity of 55 liters (14.5 gallons), but the maximum cream load should not exceed 25 liters (6.6 gallons). The minimum cream load is 10 liters (2.6 gallons). The butter making cycle takes 20-35 minutes and has a 32%-42% butter output from the cream. FEATURES:
Or at least: Clock Speed of Video Memory (RAMDAC) 800MHz Maximum 2D Resolution (at 32-bit color) Up to 2560 x 1600 Maximum 3D Resolution (at 32-bit color) Up to 2560 x 1600 Megapixels/Megatexels 4.8 Gtextels/sec. Supports MPEG-1, 2 Yes TV-Out Yes Stereo Sound No DVD Decoding Yes S-Video Output Yes Video Format MPEG-1, MPEG-2, MPEG-4, DVD, HDTV A multi-stage grain drying system of a combine harvester comprises an air blower, a heat exchanger, a starting and generation all-in-one machine, a vehicle-mounted battery, a lifting auger, far infrared heaters and a grain collecting box, wherein the heat exchanger is installed on an exhaust pipe of an internal combustion engine, an air inlet end of the heat exchanger is connected with the air blower, an air outlet end of the heat exchanger is connected with a hot air pipeline, one branch of the hot air pipeline is connected with the lifting auger, the other branch of the hot air pipeline is connected with the grain collecting box, the lifting auger is provided with a first-stage far infrared heater, the middle of the grain collecting box is designed to be of a throat shape, a second-stage far infrared heater is installed in the center of the throat, and the first-stage far infrared heater and the second-stage far infrared heater are connected with a front inverter, a rear inverter, the vehicle-mounted power battery and the starting and generation all-in-one machine through connecting lines. The multi-stage grain drying system of the combine harvester is directly embedded into a work component of the combine harvester, directly dries grains in the combine harvester, and has the advantages of being simple in structure, being low in cost and saving energy. The multistage grain drying system of a kind of combine, comprise fan blower 1, heat exchanger 15, starting-generating all-in-one 4, inverter, on-vehicle battery 6, promote screw feeder 9, far-infrared heater, receipts tanker 11, it is characterized in that, heat exchanger 15 is arranged on the blast pipe 2 of combine internal combustion engine 3, the inlet end of heat exchanger 15 is connected with fan blower 1, the termination hot air duct 14 of giving vent to anger of heat exchanger 15, a branch road of hot air duct 14 is connected with lifting screw feeder 9, cereal charging aperture 13 is located on this branch road, and tanker 11 is received in another branch road access of hot air duct 14; Promote on screw feeder 9 one-level far-infrared heater 12 is installed, the outlet that promotes screw feeder 9 is located at the top of receiving tanker 11, the middle part of receiving tanker 11 is designed to aditus laryngis shape, and secondary far-infrared heater 10 is installed by the central authorities of aditus laryngis, forms a narrow annular annular channel with aditus laryngis; One-level far-infrared heater 12 is connected with front inverter 5, vehicle mounted dynamic battery 6, rear inverter 7, starting-generating all-in-one 4 by being connected electric wire 8 with secondary far-infrared heater 10, and starting-generating all-in-one 4 is connected with combine internal combustion engine 3. |
Currently Active Users Viewing This Thread: 2 (1 members and 1 guests) | |
lionagony |
Thread Tools | |
Similar Threads | ||||
Thread | Thread Starter | Forum | Replies | Last Post |
A1200 RF module removal pics + A1200 chips overview | eXeler0 | Hardware pics | 2 | 08 March 2017 00:09 |
Sale - 2 auctions: A1200 mobo + flickerfixer & A1200 tower case w/ kit | blakespot | MarketPlace | 0 | 27 August 2015 18:50 |
For Sale - A1200/A1000/IndiAGA MkII/A1200 Trapdoor Ram & Other Goodies! | fitzsteve | MarketPlace | 1 | 11 December 2012 10:32 |
Trading A1200 030 acc and A1200 indivision for Amiga stuff | 8bitbubsy | MarketPlace | 17 | 14 December 2009 21:50 |
Trade Mac g3 300/400 or A1200 for an A1200 accellerator | BiL0 | MarketPlace | 0 | 07 June 2006 17:41 |
|
|