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-   -   Generic 16Mhz 68000 Accelerator Board (https://eab.abime.net/showthread.php?t=59040)

pandy71 05 May 2011 19:13

Quote:

Originally Posted by SpeedGeek (Post 753910)
WTF do A2620 PAL's have to do with A2630?
From A2630 U504 rev 3
"This sync-up is only required when the board is in a B2000, since that board will be receiving E from the motherboard."

A2620 and A2630 peform similar function - remove 68000 from CPU socket, place new accelerator card instead 68000 - is that really difficult to understand that E clock (trivial part) and proper VPA/VMA/DTACK timing for CIA's (less trivial) must be created to replace 68000?

Quote:

Originally Posted by SpeedGeek (Post 753910)
A1200 has 68020 on motherboard and Gayle generates E clock. A3000 and A4000 have 68030 or 68040 and Fat Gary generates E clock. It's a "No Brainer" that 020,030 and 040 have no E clock output! On A600 it looks like the coin flip went to Gayle for E clock generation.

E clock is asynchronous - not an issue to generate 7MHz/10 clock, issue is create proper timing ie replace synchronous VPA/VMA by DTACK.

I see no point to keep MC68000 as E clock source only... (less complicated PCB)

I hope that now it is more clear...

Zetr0 06 May 2011 00:20

@Pandy71

looking at the A2000 schematics (rev 6)

At the accelerator port -

[ _VMA (p51) ] is bidirectional as you would expect
[ _VPA (p48)] is an input (to the accelerator) only
[ E (p50) ] is an input (to the accelerator) only,
I would say that E is generated by the 68000 on the motherboard as a result of the 7Mhz feed irrespective of its status on the bus.

I wonder what would happen if the Host CPU was removed from the system on the Rev6 A2000 motherboard with an accelerator. Arguably there would be no generation of the E clock to run the CIA's =(

This is a very interesting puzzle and Its great to be putting assumptions to one side and actually learning something in the process =D

Kai 06 May 2011 09:22

Have a look at that PDF for the LUCAS 68020 Accelerator - page 6. The flip flop/oscillator arrangement looks like it deals with everything as it should...?

Jope 06 May 2011 10:56

The German A2000A requires you to remove the 68000 before connecting the 2620/2630. In this case the accelerator board must generate the E clock itself.

RedskullDC 06 May 2011 12:00

Hi Jope,
Quote:

Originally Posted by Jope (Post 753428)
Look at Aminet, this was done for the Amiga too in a compatible fashion.

http://aminet.net/package/docs/hard/14MhzA500

Perhaps RedskullDC himself could elaborate whether it had the slowdown for disk access support in it, I'm too busy to check it out right now.

Afraid not, as others have mentioned, it runs the E-Clock too fast.
It was a very simple hack indeed at the time...

Cheers,
Red

SpeedGeek 06 May 2011 15:07

@pandy71
I did not suggest keeping the 68000 just for E clock generation. I also suggested keeping it for the "Reboot in 68000 mode" feature. VPA is generated by Gary or Gayle based on address decoding. The logic equation for VMA generation is simply VMA = VPA * /E + VMA * AS (VPA, VMA and AS are asserted low). The logic needed for bus arbitration/mastership is not exactly rocket science.

@Jope
You are 100% correct. The A2630 can optionally generate E clock by setting jumper J302 to A2000 mode. This is only needed on old "German" 4-layer motherboards which require the 68000 to be pulled. Obviously, this would disable the "Reboot in 68000 mode" feature.

pandy71 06 May 2011 17:51

Quote:

Originally Posted by SpeedGeek (Post 754223)
@pandy71
I did not suggest keeping the 68000 just for E clock generation. I also suggested keeping it for the "Reboot in 68000 mode" feature. VPA is generated by Gary or Gayle based on address decoding. The logic equation for VMA generation is simply VMA = VPA * /E + VMA * AS (VPA, VMA and AS are asserted low). The logic needed for bus arbitration/mastership is not exactly rocket science.

I know how to recreate CIA's cycle - there is even nice drawing on GAYLE specification about CIA timing - not a problem but my point is that You need to create all those signals - this is important from Amiga point of view but i see that ST don't use VPA/E at all so some accelerator made for ST only usually are not able to deal with Amiga directly.
E clock generation not an issue, CIA's timing not an issue - but both must be implemented. Personally i can live without 68000 (for 68000 compatibility i can use different A500)

keithamiga1200 05 October 2020 19:34

Ignore, wrong tread doh!


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