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#1 |
Registered User
Join Date: Jan 2019
Location: Germany
Posts: 3,382
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Burn 100000 on the 68040
Hi folks, hope to get some help here with a pretty special request. I'm looking for a verified(!) code that burns 100000 cycles on the 68040. Assumption is that the code is cached and in cacheable memory. Thus, one can assume that the code is completely in cache. You can also assume that task switching and interrupts are disabled. The code should approximately look as follows:
Code:
DelayLoop040: move.l #1000,d0 .loop: nop ;8 cycles per nop nop nop nop nop nop nop ;8 cycles per nop nop nop nop nop nop ;12 * 8 = 96 cycles burned dbra d0,.loop ;+3 cycles for dbra = 99 cycles burned rts ![]() |
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#2 |
Registered User
Join Date: Jan 2008
Location: Warsaw/Poland
Age: 56
Posts: 2,085
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Why not, something like this?
Code:
move.w #999,D0 Loop addq.l #1,D1 ; 1 (1 cycle) addq.l #1,D1 ; 2 ... addq.l #1,D1 ; 97 dbf D0,Loop (3 cycles) rts |
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#3 |
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Join Date: Jan 2019
Location: Germany
Posts: 3,382
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It doesn't really matter what is in the loop as long as you had it verified. "NOP" seemed like a good alternative since it seems to burn more cycles (less instructions), but that does not matter too much. It does not have to be super precise.
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#4 |
son of 68k
Join Date: Nov 2007
Location: Lyon / France
Age: 51
Posts: 5,377
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NOP can burn many cycles because it triggers a pipeline resync. Thus its timing may eventually depend on what the cpu was doing before.
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#5 |
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Join Date: Jan 2019
Location: Germany
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Absolutely. This is why I need it verified for the 68040. I have a verified NOP delay loop for the 68030, but I cannot simply reuse the same loop for the 68040 for the reasons you gave. The NOP on the 68040 will spend a different (more?) number of cycles than the NOP on the 68030.
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#6 |
son of 68k
Join Date: Nov 2007
Location: Lyon / France
Age: 51
Posts: 5,377
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Why using NOP then ? It does not look like a very reliable source for cycle counting.
Unfortunately i don't own a 040 so i can't verify timings, but Don Adan's code looks good enough. |
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#7 |
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Join Date: Jan 2019
Location: Germany
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That's not any different with any other instruction - timing will differ between the 68030 and 68040 anyhow, so I need two delay loops in first place. Anyhow, I'm not insisting on NOP, I only need to be sure it really burns the requested number of cycles.
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#8 |
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Join Date: Nov 2015
Location: Italy
Posts: 193
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Can't you do something self calibrating like it's being done elsewhere to implement things like very small (busy looping) time delays.
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#9 |
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Location: Germany
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Hmm, do you have anything particular in mind? Just to remind you, the point of the whole exercise is to find the clock speed of the CPU, which I need to configure the wait states of a graphics card attached directly to the turbo board.
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#10 |
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Join Date: Jul 2014
Location: Finland
Posts: 1,192
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Sorry if this is stupid
![]() ...But isn't this over engineering? If you only need the approximate clock in MHz, why not ask it the end user during the installation process? I can't imagine there are many users with this setup who wouldn't know their installed CPU clock speed. |
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#11 |
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Join Date: Jan 2019
Location: Germany
Posts: 3,382
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Well, you know, if the casual user has to modify a tool type to get a driver working, chances are that this doesn't work. I have no problem adding a tool type for this type of configuration, but the driver should work out of the box without user intervention.
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#12 |
Thalion Webshrine
Join Date: Jan 2004
Location: Oxford
Posts: 14,582
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#13 |
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Join Date: Jan 2019
Location: Germany
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Ok, here a test program instead:
http://eab.abime.net/attachment.php?...1&d=1657639518 Please run on an 68040 system, please report the result, and the true CPU clock of the system. Thanks! |
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#14 |
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Join Date: Jan 2019
Location: Germany
Posts: 3,382
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No, not at all, only what GVP managed to manufacture as Turbo boards. It is pretty much the above range. Thus, it doesn't have to be super-precise, but it needs to distinguish the clocks to switch between 2 to 5 wait states, depending on the board frequency.
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#15 |
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Join Date: Aug 2014
Location: Netherlands
Posts: 702
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Forget about it if this is a stupid idea but:
If you can read/write into the graphics card memory. Can't you do a memory test to see how many wait states are needed for a reliable data transfer? Also, I don't have a 040 system to test on otherwise I would have helped. |
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#16 | |
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Join Date: Jun 2015
Location: Germany
Posts: 1,948
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Quote:
From what I read in the German forum, the problem has been solved, Thomas has working code already. |
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#17 | |
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Join Date: Feb 2017
Location: Denmark
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Quote:
That's interesting. Does the graphics card do thermal throttling? (Would have helped if I could with the measurements, but "only" have a 060). |
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#18 |
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Join Date: Jan 2019
Location: Germany
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Actually, I doubt such ancient technology uses thermal throttling, it is more a matter of system tolerances such that a particular configuration when measured with a cold system no longer remains stable once the system heats up as tolerances are then exceeded. It is also hard to actually detect the issues with bit flips into video RAM without actually turning the video on and trying to reproduce the issue by flooding the bus with writes.
But as ground said, the problem is resolved. Funny enough, my 68040 "computed delay loop" worked right from its design sketch, a rather rare circumstance. |
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#19 |
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Join Date: Jun 2015
Location: Germany
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As Thomas says, semiconductors get "slower" (it's more complicated physics but let's skip this) as they heat up. This can also affect power supply and a lot of other factors that determine how a processor or bus driver chip will operate.
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#20 | |
Thalion Webshrine
Join Date: Jan 2004
Location: Oxford
Posts: 14,582
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Quote:
Heat should have no affect on tests like these. What is more likely to affect speed is other bus traffic. If you stay inside the CPU, in the cache then external factors such as bus traffic etc. are ruled out. |
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