New Universal Agnus 8372, 75 etc

[kipper2k]

Hi All, here is another project working on, pretty well all done...



here is a link... We have changed the FPGA due to unavailability

https://www.buffee.ca/a-little-side-project/

Plug and play, will dropright into the PLCC socket
Near instant-on (CPLD-like) functionality
16MB of 133MHz, 8-bit pSRAM for AGA+ bandwidth
1MB, 2MB Agnus and 2MB Alice compatibility
Jumpered NTSC/PAL default modes (will also obey pin and software changes)
Automatic 8372 and 8375 pin detection (universal socket compatibility)
Many optional features to come
There is news on Buffee as well that we’ll post in coming days. Thanks!

https://github.com/nonarkitten/amiga...v0.5-(ReAgnus)

[Pyromania]

Nice!

[eXeler0]

All hail the Canadian wizards

[jbenam]

One step closer to being able to build entirely new Amigas (and also save some old ones )

[DisasterIncarna]

love stuff liek this, and yeah it would be nice to be able to build whole new units with updated parts, perhaps 1 day on custom motherboards with the updated replacement chips and have modern ports, hdmi/etc.

[roondar]

Very interesting stuff. Seems it can be put in a 'compatible' mode as well where it just does what the system would normally have, which is great stuff - best of both worlds really, options for authentic behaviour and options for a bit more oomph for those who want it

[klx300r]

@ kipper2k

[Mathesar]

Looks really nice. I just love how you made a plcc chip out of a PCB

[nikosidis]

Love it Thanks for doing this.

[grelbfarlk]

Awesome!

[AmigaHope]

Originally Posted by kipper2k

16MB of 133MHz, 8-bit pSRAM for AGA+ bandwidth

How does this work? Does it remove nasty mode DMA contention for the CPU side somehow? Only through max-speed blitter, or something else?

Simultaneous service of both data buses?

[alexh]

Sounds interesting. Not only the Agnus/Alice but the RAM as well? Similar to a MultiMega?

[malko]

Whaou !

[Lord Aga]

Disk access opening the door to PC floppies that aren't RPM nerfed.

OooOOOoooh

[Promilus]

Am I right it is GW1NR9 FPGA from GOWIN (China)?

I'm afraid there'd be plenty of problems going above 2MB chip ram. But overall it's good solution for A500 rev6 users which have hard time getting affordable superfat agnus with chip memory mod. But... will there be a version which works with A1000 and rev5 A500? Also - am I wrong about Alice having just 16bit memory interface? How will it work with 32bit AGA chipset which seems to be controlled by both Alice and Budgie?

[kipper2k]

Originally Posted by Promilus

Am I right it is GW1NR9 FPGA from GOWIN (China)?

I'm afraid there'd be plenty of problems going above 2MB chip ram. But overall it's good solution for A500 rev6 users which have hard time getting affordable superfat agnus with chip memory mod. But... will there be a version which works with A1000 and rev5 A500? Also - am I wrong about Alice having just 16bit memory interface? How will it work with 32bit AGA chipset which seems to be controlled by both Alice and Budgie?

It isn't a Gowin chip The coding is being done by Nonarkitten and most of the info is on the Github and her Blog. Using the custom paula and Denise chip will enable AGA, sometimes she talks above my paygrade.

edit, i just looked at price of that gowin, i dont think anyone would buy an agnus with that chip, (Isee prices of $300 + for that chip, ouch!

[Promilus]

Oh, I see. ICE65 with 2x external 4bit PSRAM if I'm reading schematics correctly. And that's because when all banks are powered from 3.3V it makes I/O 5V tolerant so it doesn't require additional level shifters?

[kipper2k]

Originally Posted by Promilus

Oh, I see. ICE65 with 2x external 4bit PSRAM if I'm reading schematics correctly. And that's because when all banks are powered from 3.3V it makes I/O 5V tolerant so it doesn't require additional level shifters?

[Promilus]

edit, i just looked at price of that gowin, i dont think anyone would buy an agnus with that chip, (Isee prices of $300 + for that chip, ouch!

that's rather impossible since dev board with this chip costs ~20$. But the problem is dual-supply for I/O (some pins are at 1.2V iirc) and no way to make it 5V tolerant, it would need level shifters making design bulky so I guess iCE65 is optimal.

[kipper2k]

Originally Posted by Promilus

that's rather impossible since dev board with this chip costs ~20$. But the problem is dual-supply for I/O (some pins are at 1.2V iirc) and no way to make it 5V tolerant, it would need level shifters making design bulky so I guess iCE65 is optimal.

problem is ice65 is no longer sold and supported, and as yet it hasnt had a good smoke test hence the reason for not releasing info for it. We are early in Dev so as they say time will tell