FPGA based A500 accelerator

[Gorf]

Originally Posted by Samurai_Crow

[ Show youtube player ]

Well - that is just a new (or not so new?) attempt to take advantage of the otherwise hidden instruction-level parallelism in (singe threaded) code.
VLIW was trying to do the same, by analyzing the code with the compiler and produce wide instructions, that can feed many parallel execution units...
But compilers weren't really as good in doing it as they predicted, being one of the reasons for Intels EPIC to fail.

Transmeta was doing the same by dynamically translate x86 into VLIW code and the Tegra CPUs do the same for ARM to VLIW.

According to the video, they now might try to put more and more silicon and software, AI and ML, and so on to that task ...

Sound like an overcomplicated mess to me to be honest and is probably nothing that will do anything for us in terms of an FPGA accelerator.
(WinUAE would automatically take advantage of this, when it ever happens)

For us it would probably be enough to concentrate on a more straight forward approach: modern RISC cores already do some parallelism in form of out-of-oder and superscalar execution. They can already execute 2 instructions at once (or more if you take FPU and SIMD into account).

The other step forward would be to give the AmigaOS the ability to take advantage of multiple processors ... some work has done already on AROS (clean way) some other by the Vampire team (hidden and "dirty") via multithreading on the 68080.

[meynaf]

Originally Posted by Fastdruid

Soft Machines is mentioned in that talk and Intel acquired them a few years ago.

https://www.theregister.co.uk/2016/0...soft_machines/

Thanks. This allowed me to do a better research and i found this :
https://www.anandtech.com/show/10025...cture-visc-ipc

But current cpus have several execution units already, so it's unclear to me where the benefit of dispatching to several cores could be...

[Lemaru]

Originally Posted by kipper2k

@lemaru the a600 adapter works fine (with 1 jumper wire, which i messed up) I was about 0.040" out with my measurements and had to push it down a bit, i designed a nice 3d printed support so that the aapter sits nicely. The Dip 68000 cpu fits nicely and case will close (objective completed ). The A500 vampire a500 also works in the a600 but the case wont close which i think everyone knew it wouldnt. (our accel will be able to fit with the case closed and that was the primary objective. I will release files once its 100%

Hi Kipper, I was just wondering on the status of the A600 adaptor and it's release, or if you are waiting for the accelerator to be done.

I am keen to get it tested out with a terriblefire and maybe some other A500 accessories to see how it goes. and maybe re-jigging the layout to fit my setup better.

Oh, and nice work on the new board!

[kipper2k]

Originally Posted by Lemaru

Hi Kipper, I was just wondering on the status of the A600 adaptor and it's release, or if you are waiting for the accelerator to be done.

I am keen to get it tested out with a terriblefire and maybe some other A500 accessories to see how it goes. and maybe re-jigging the layout to fit my setup better.

Oh, and nice work on the new board!

Hi,
Thanks for the kind words. I can't speak for Mike but i think there should be an update pretty soon, he has been able to make some progress. i will give it a couple of weeks before i show anything on the final adapter. I did modify it a bit so that you can use it with a 3D printed rail that will lock it into place. I have to send it in for one more build to confirm, but i think its good.

The SMD500 is giving me a hard time atm, pretty well all functions work but having stability issues. Agnus', Gotek/OSD, sound, composite,SVID/RGB etc works fine.

The A1k board is at similar level

[ex68k]

Originally Posted by kipper2k

Hi,
Thanks for the kind words. I can't speak for Mike but i think there should be an update pretty soon, he has been able to make some progress.

Any updates?

[Samurai_Crow]

Originally Posted by ex68k

Any updates?

The post before yours was only 3 days old.

[digiflip]

Any News on this card?

[mkstr]

Update time. Sorry for silence on this - everything went out of the window in March as you can imagine and my day job took over a bit. However, development has been progressing and the production hardware is designed and being laid out at the moment.

The design has been ported to the final target FPGA and passes timing at 80 MHz. There is a new memory interface and the overall performance is now faster than the A4000 in SysInfo.



This is close to where I expect performance to be in the release version.

AIBB numbers relative to A600 for various tests:

IMath = 96.24 (A4000 is 41.28
FMath = 21.07 (A4000 is 16.17 - no FPU)
Dhrystones = 22.66 (A4000 is 19.03)
MemTest = 28.89MB/s = 24.02 (A4000 is 3.48)

Mike

[JoeJoe]

wow...nice one. where is the order button?

[kipper2k]

There has been some testing of a few demos, and all are rock solid and silky smooth, more testing is taking place as tweaks are made > There are a lot of demos out there and TBF we havent had a chance to devote a lot of time to checking a wide spectrum

[robinsonb5]

Very impressive - nice going!

[FREEMILK]

Originally Posted by kipper2k

There has been some testing of a few demos, and all are rock solid and silky smooth, more testing is taking place as tweaks are made > There are a lot of demos out there and TBF we havent had a chance to devote a lot of time to checking a wide spectrum

but we will

[RemoteFlyer]

Wow, that's fast, which core is the fpga using?

[mkstr]

Originally Posted by remoteflyer

wow, that's fast, which core is the fpga using?

tg68

[nikosidis]

Give me this for AGA, A1200 and you have a customer

[protek]

I knew there was a reason why I’ve kept an A500 lying around.

[d4rk3lf]

Originally Posted by protek

I knew there was a reason why I’ve kept an A500 lying around.

With this, you can call it Amiga 5000.

[digiflip]

where is the mkstr store? I need to get on the preorder list pronto

[skan]

Originally Posted by mkstr

tg68

I'm completely ignorant about the technical details, so just asking out of curiosity: how does this compare to the fx68k?

[robinsonb5]

Originally Posted by skan

I'm completely ignorant about the technical details, so just asking out of curiosity: how does this compare to the fx68k?

As I understand it, fx68k is designed to be cycle-accurate, for use in retro systems where the time taken to execute a piece of code must match the original machine. Beam-racing demos on the ST are a prime example of where this is useful.

The TG68 is a much looser implementation (in a good way) - the design goal was, I think, just to create a CPU capable of running 68000, and later 68020 code, on an FPGA, and it happens to be able to do so at a very respectable speed.


Because of the Amiga's design it's much more unusual to find Amiga software that fails if, for example, a multiply takes the wrong number of cycles, so TG68 will take advantage of things like the fast multipliers built into modern FPGAs.