Problematic Demos.

[Toni Wilen]

Originally Posted by PiCiJi

Jim Power "Two Live Crew" crack hangs. it modifies the blitter while it's running and disables "Skip B" and "Skip Y" same time.
When this happens and Stage X is active, the crack intro expects "probably" Stage A to be active in addition to Stage Y.
At least another "shifter bit" is necessary so that the blitter counts down faster.

"Nice". Another Two Live Crew production with broken blitter usage. Other was Lotus II cractro that does it differently. Already listed in this thread (http://janeway.exotica.org.uk/release.php?id=17846).

Any "normal" shifter bit combination does not seem to work fully correctly. I guess this needs logic analyzer check..

[Toni Wilen]

Originally Posted by Toni Wilen

Any "normal" shifter bit combination does not seem to work fully correctly. I guess this needs logic analyzer check..

Cycle diagram become ACCCACCC.. So this probably means A is A if D is not enabled at the same time. B or C or D at the same time -> C (Blitter RGA selection is a forest of gates in schematics, difficult to follow..)

This cractro only works if 3 bits gets injected (which fits with ACCC sequence)

If B skip gets disabled: A goes to B.
If Y skip gets disabled: X goes to Y and OUT

This combination results in 3 bits without breaking my other test statefiles, including two lives crew lotus 2 cractro.

EDIT: thanks to ross for logic analyzer trigger test executable

[PiCiJi]

Cycle diagram become ACCCACCC

In both situations?

the cractro change AD -> ABCD. This happens in 2 situations: when Stage A or Stage X is active.

first i thought it becomes CCCC with 3 shifter bits, but ACCC has 2 shifter bits.
I built it in such a way that a 2nd shifter bit is added in both situations.

[ross]

Originally Posted by PiCiJi

In both situations?

If by "both situations" do you mean the two 'temporal positions' where BLTCON0 can be written, then yes, that's how it seems.
(there is actually only one situation, the (re)write with active blitter of different number of channels, in two possible different internal blitter shifter conditions).

The difference at the 'change start' is this:
- A BLTCON0 DACC-ACCC
- D BLTCON0 ADAC-CCAC
I can double check but I've only ever seen ACCC.

But there is a difference when counter expires (i.e. last full cycle):
- CCCACCCD-D
- ACCCABCD-D

Interesting, right?
Don't ask me for more details because other in-depth tests need to be done

But the fix made by Toni works perfectly for the current case and previous similar cases.

[PiCiJi]

Originally Posted by ross

The difference at the 'change start' is this:
- A BLTCON0 DACC-ACCC
- D BLTCON0 ADAC-CCAC

got the same

Originally Posted by ross

But there is a difference when counter expires (i.e. last full cycle):
- CCCACCCD-D
- ACCCABCD-D

Interesting, right?

definitly. thank you for this info.
seems like the blitter is trying to get back into its default behavior at the end.
i get ACCC-D or ACC-D
don't do any special here, cractro works anyway.
something for todo list