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Old 23 April 2021, 15:04   #41
jotd
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Frank I found an executable that confuses IRA a lot.Zoned (Hero Quest 2 executable, unpacked with Propack)
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Old 23 April 2021, 17:30   #42
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Got it. Thanks.
Do I use RNC_ProPack from Aminet to unpack?
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Old 23 April 2021, 19:21   #43
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you don't need to unpack it. I already unpacked it. The unpacked version has issues with ira

shitload of "reloc" messages, and data section never finishes/creates a huge chunk of dc.b
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Old 23 April 2021, 22:23   #44
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Ok. Fixed. Try the latest beta source from here:
http://sun.hasenbraten.de/~frank/TEST/ira_210beta.lha

Thanks for reporting!
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Old 23 April 2021, 22:39   #45
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working just fine! great fix, thanks
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Old 02 October 2021, 18:40   #46
kamelito
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@PHX

It seems that IRA is having troubles disassembling some opcodes, I might have made a mistake but I choose 68060 so it includes FPU and MMU.
Here some examples of not properly decoded ones.
thanks


DC.W $f328
DC.W $0000
=> fsave 0(a0)

DC.W $f228
DC.W $f0ff
DC.W $00e4
DC.W $f228
CMP.B D0,D6
DC.W $00d8
=> fmovem.x fp0-fp7,$e4(a0)
fmovem.l fpcr/fpsr/fpiar,$d8(a0)


DC.W $4e7a
DC.W $0803
=> movec msp,d0
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Old 02 October 2021, 22:44   #47
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Quote:
Originally Posted by kamelito View Post
It seems that IRA is having troubles disassembling some opcodes
It certainly does. Unfortunately FPU opcodes were not implemented until today.

Quote:
=> movec msp,d0
As far as I know MSP and ISP only exist on 020, 030 and 040.
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Old 03 October 2021, 10:06   #48
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@phx I tried 040 but it is not working too but I’ll have to double check.
Is it in a nightly build? Any link?
The problem is that I’m disassembling a debugger so it contains all opcodes and I’d like to know the corresponding mnemonics even if I might put only the opcodes afterward and let the mnemonics as comments.
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Old 03 October 2021, 18:50   #49
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Quote:
Originally Posted by kamelito View Post
@phx I tried 040 but it is not working too but I’ll have to double check.
Please do. Works here:
Code:
frank@nerthus cat movec.s
        mc68040
        movec   msp,d0
        rts
frank@nerthus vasmm68k_mot -quiet -Fhunkexe -o movec movec.s
frank@nerthus ira -m68040 movec

IRA V2.10 (May 17 2019)
(c)1993-1995 Tim Ruehsen (SiliconSurfer/PHANTASM)
(c)2009-2015 Frank Wille
(c)2014-2019 Nicolas Bastien


SOURCE : "movec"
TARGET : "movec.asm"
MACHINE: MC68040
OFFSET : $00000000
codeAdrs: 0   codeAdrMax: 16
CodeArea[0]: 00000000 - 00000008


Pass 1: 100%
Pass 2: writing mnemonics
100%


frank@nerthus cat movec.asm
; IRA V2.10 (May 17 2019) (c)1993-1995 Tim Ruehsen
; (c)2009-2015 Frank Wille, (c)2014-2019 Nicolas Bastien

        MC68040



        SECTION S_0,CODE

SECSTRT_0:
        MOVEC   MSP,D0
        RTS
        NOP
        END
Quote:
Is it in a nightly build? Any link?
Try my link from 5 posts back. This should be the latest source archive.
There are no nightly builds as Nicolas only has time to work on IRA every 6-12 months. I'm also busy with many other projects, so I only do important bug fixes.
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Old 03 October 2021, 20:21   #50
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Thanks a mil.
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Old 06 October 2021, 15:29   #51
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@PHX it doesn't work on my disassembly.
Is there is a way to modify the source code so it disassemble every existing opcodes from 68000 to 68060 including 68881/82 and MMU?
Thx
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Old 06 October 2021, 17:25   #52
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I understand your problem now. With that debugger you have a program which supports multiple CPUs and therefore also has parts with opcodes for them.
Difficult, because IRA currently has no means to assign a cpu-setting to specific program regions. It's always for the whole program. I agree that would be a useful addition, though.

A hack to the IRA source you can try:
Code:
--- init.c      26 Apr 2017 20:03:22 -0000      1.9
+++ init.c      6 Oct 2021 15:11:40 -0000
@@ -309,6 +309,8 @@
                               else
                                  if (!strcmp(&odata[2], "060"))
                                     ira->params.cpuType |= M68060;
+                                 else if (!strcmp(&odata[2], "0x0"))
+                                    ira->params.cpuType |= M680x0;
                                  else
                                     ExitPrg("Unknown processor Motorola %c%s", option, odata);
             else
Then reassemble with -m680x0. But IRA won't emit the matching MC680.. directives when a cpu-specific opcode was found. It just emits "MC68060" on top, which is wrong. So even in the best case you have to check the reassembled source.
And turn on -a, so you know if a PFLUSHA mnemonic was meant for 68030 or 68060.
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Old 06 October 2021, 17:27   #53
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Quote:
Originally Posted by kamelito View Post
The problem is that I'm disassembling a debugger so it contains all opcodes and I'd like to know the corresponding mnemonics even if I might put only the opcodes afterward and let the mnemonics as comments.
Which debugger are you disassembling?
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Old 06 October 2021, 20:02   #54
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@PHX I’m gonna test that thanks!
@Bruce Abbott it is Monam.
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Old 07 October 2021, 23:29   #55
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Quote:
Originally Posted by kamelito View Post
@Bruce Abbott it is Monam.
For comparison, here is a disassembly of Monam 3.08 using my own disassembler.

This reassembles 100% with ProAsm, but there are some tables in it that are not decoded, so expect it to break if you make changes that change the offsets.
Attached Files
File Type: zip MonAm.zip (58.4 KB, 90 views)
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Old 08 October 2021, 10:44   #56
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@Bruce
Thanks, I’ll have a look. I remember about your disassembler not yet public right?

update : nice disassembly is it a first pass or did you work on it to improve the output?

Last edited by kamelito; 08 October 2021 at 18:16.
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Old 10 October 2021, 22:10   #57
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Quote:
Originally Posted by kamelito View Post
@Bruce
Thanks, I’ll have a look. I remember about your disassembler not yet public right?
Not yet, but I hope it will be soon (have to stop adding stuff to it!).

Quote:
nice disassembly is it a first pass or did you work on it to improve the output?
Mostly one pass, I just tweaked it a bit to show some data as ascii strings and fix a couple of lines with self-modifying code (this only took a few minutes because my disassembler is fully interactive).

And now I have decoded the case tables (updated disassembly attached). For this I had to identify the code that used them to verify the base addresses (if the code is nearby this is usually done automatically, but Monam calls a subroutine which my disassembler was not smart enough to identify).

One reason my disassembler isn't finished yet is that I am constantly finding things which could be improved. In this case I see Monam can disassemble two instructions that I didn't know about (plpar and plpaw). Looks like they are 060 only, which my disassembler doesn't currently support.
Attached Files
File Type: zip MonAm_complete.zip (49.0 KB, 89 views)
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Old 11 October 2021, 09:17   #58
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@Bruce,
Great, can’t wait to test it.
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Old 30 May 2022, 22:44   #59
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last version of IRA can't disassemble for instance kick 1.1 (A1000). It "forgets" all the labels & entrypoints. IRA v2.00 does the job perfectly.
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Old 01 June 2022, 17:30   #60
phx
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Last official release (V2.09) on Aminet? Do you have the ROM file and a config file for reproduction? Also the command line options used.
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