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Old 12 June 2022, 18:01   #1
jasonsbeer
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Gayle Register $DA9000 and IDE

I am working on a IDE hard drive interface using a "fake Gayle" interface and have a question about how register $DA9000 is intended to be used. I need help understanding how the register is intended to be implemented for correct IDE functionality.

Register $DA8000, bit 15 states "Interrupt output of the IDE drive; this bit is high whenever the IDE device is generating an interrupt."

Register $DA9000, bit 15 states "Are the same signals as at address $DA8000, but the register at $DA9000 tells you when any of these bits has changed value. The bit remains high (and the interrupt line remains active) until a '0' is written to that bit. Writing a '1' will cause a bit to be unchanged."

I feel the description of $DA9000 is ambiguous and can be interpreted at least two ways...

1) $DA9000 is identical to $DA8000, and bit 15 is '1' while the IDE device is asserting an interrupt request. Bit 15 is '0' when the IDE device is not asserting an interrupt.

-or-

2) Bit 15 of $DA9000 is '1' when the the status of the IDE interrupt request has not changed between $DA9000 reads. If the status has changed, then D15 is '0' the next time $DA9000 is read, such as in the table below. READ = $DA9000 read cycle, IDEIRQ = IDE Interrupt Request state, D15 = bit 15 read with register $DA9000.

Code:
READ  IDEIRQ  D15
----------------
0     0       1
1     0       1
2     1       0
3     1       1
4     1       1
5     0       0
6     0       1
7     0       1
8     0       1
Anything else I should be watchful of with $DA9000 from the IDE context? Are there any situations where I need to consider writes to this register?

Gayle specs: https://retro-commodore.eu/files/dow...Manual-ENG.pdf A description of the registers are at the end of the document.

Thanks a bunch!
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Old 12 June 2022, 22:04   #2
alexh
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You can get the full HDL for a (confirmed working) Gayle IDE interface from IDE68k project which fully describes how it works.

It is written in a language called ABEL but I converted it automatically into VHDL/Verilog once before but it is so simple you may as well just read the source.

(Mr.MKL's original site is gone but here is a mirror)

http://archive.retro.co.za/mirrors/6...de/ide68k.html

There is a lot of information about a Gayle IDE implementation here too :

http://aminet.net/package/docs/hard/hddmem_exp_a50

Last edited by alexh; 12 June 2022 at 22:10.
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Old 14 June 2022, 00:02   #3
jasonsbeer
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Thanks for the references. I think I have it figured out now with everyone's help.
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Old 14 June 2022, 18:28   #4
Jope
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Quote:
Originally Posted by alexh View Post
MKL's original site is gone
He's put up a new site here:

http://www.mklboards.fi/ide/ide68k.html
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