Open source 14MHz 68000 accelerator - Page 5

NorthWay · 08 October 2021, 18:33

Quote:

Originally Posted by utri007

make sure that SCSI doesn't try DMA to accelerator's memory?? How?

Set the mask in HDToolbox (or your prefered hd setup tool) to something with the top 8 bits unset. $00FFFFFE could be a starting point.
(I haven't fiddled with this in ages, but I hope you get the drift at least.)

utri007 · 08 October 2021, 21:18

Quote:

Originally Posted by NorthWay

Set the mask in HDToolbox (or your prefered hd setup tool) to something with the top 8 bits unset. $00FFFFFE could be a starting point.
(I haven't fiddled with this in ages, but I hope you get the drift at least.)

OK, thanks MASK is now 0XFFFFFE, is it same than than $00FFFFFE

What value I should try instead of 0XFFFFFFE?

Mathesar · 09 October 2021, 07:31

Shouldn't mask be set to all zero to disable DMA altogether? Eg 0x00000000 ?

patrik · 09 October 2021, 07:52

The mask does not control DMA at all, it is just a condition of whether or not to re-route the device transfers through a memory area deemed safe (up to the file system what that is). The filesystem which uses the mask has no idea about wether or not the device will use DMA or not to make its transfers and will do the same for both PIO and DMA devices, so you can totally axe the performance of PIO devices by using mask too.

Via the mask it knows that the driver should only be allowed to transfer data to/from memory matching it, which it will honor, so a mask of zero should in theory give a non-working partition, but it is possible the file system will default to something instead of zero.

There is no standardized api call in devices to disable dma, there is only the mask hack to re-route transfers.

utri007 · 09 October 2021, 18:02

I didn't find these with google Amiga HdToolbox mask values

0x5FFFFe should allow zorro II ram
0x1FFFFe should allow only chip ram

How ever this acclerator doesn't work with GVP HD8+

Mathesar · 09 October 2021, 19:53

Quote:

Originally Posted by utri007

I didn't find these with google Amiga HdToolbox mask values

0x5FFFFe should allow zorro II ram
0x1FFFFe should allow only chip ram

How ever this acclerator doesn't work with GVP HD8+

The problem is DMA. Any DMA attempt by the GVP will crash the system.
It is fixable but it requires a hardware mod.

utri007 · 10 October 2021, 01:39

Just tried to make this work with MKL's IDE and it doesn't work. It some sort disables it, if connected. I have a working IDE with normal CPU, but with this is just doesn't see hard drive. http://www.mklboards.fi/ide/ide68k.html

Wondering would this be easy to fix? Problem must be OVR or INT2 signal?

Mathesar · 10 October 2021, 07:49

Quote:

Originally Posted by utri007

Just tried to make this work with MKL's IDE and it doesn't work. It some sort disables it, if connected. I have a working IDE with normal CPU, but with this is just doesn't see hard drive. http://www.mklboards.fi/ide/ide68k.html

Wondering would this be easy to fix? Problem must be OVR or INT2 signal?

I see no real reason why it wouldn't work. How did you stack the two boards? (what board is "under")?

utri007 · 10 October 2021, 11:48

Quote:

Originally Posted by Mathesar

I see no real reason why it wouldn't work. How did you stack the two boards? (what board is "under")?

MKL's IDE is under. Amiga works ram is there, but IDE is missing.

Mathesar · 10 October 2021, 15:22

Quote:

Originally Posted by utri007

MKL's IDE is under. Amiga works ram is there, but IDE is missing.

That is the "right" order. So the fast RAM on the ide board is working but the ide part is not? I don't think int2 is the problem, more a timing issue with dtack/address/ovr. Is the logic of mkl's ide open source so we can have a look?

utri007 · 10 October 2021, 16:11

Quote:

Originally Posted by Mathesar

That is the "right" order. So the fast RAM on the ide board is working but the ide part is not? I don't think int2 is the problem, more a timing issue with dtack/address/ovr. Is the logic of mkl's ide open source so we can have a look?

Correct ram works, but not IDE. If I remove accelerator it just works with ordinary 68000 cpu.

It is open source http://www.mklboards.fi/ide/ide68k.html

keithamiga1200 · 10 October 2021, 22:12

Quote:

Originally Posted by utri007

Correct ram works, but not IDE. If I remove accelerator it just works with ordinary 68000 cpu.

It is open source http://www.mklboards.fi/ide/ide68k.html

And why would some ancient design be relevant? If you want an IDE, extra ram, and acceleration? Go buy a Witcher or a Terrible Fire card! Jeeze, it's an open source, fun design.

utri007 · 10 October 2021, 23:33

Quote:

Originally Posted by keithamiga1200

And why would some ancient design be relevant? If you want an IDE, extra ram, and acceleration? Go buy a Witcher or a Terrible Fire card! Jeeze, it's an open source, fun design.

Quite much every IDE solution on amiga is based to this design. As far I have understand, even TF cards.

This accelerator works with KCS Power PC board, TF cards doesn't.

utri007 · 11 October 2021, 22:34

Quote:

Originally Posted by Mathesar

The problem is DMA. Any DMA attempt by the GVP will crash the system.
It is fixable but it requires a hardware mod.

What kind of hardware mod?

Samurai_Crow · 11 October 2021, 22:43

Tristate buffers for one thing.

utri007 · 11 October 2021, 23:48

Quote:

Originally Posted by Samurai_Crow

Tristate buffers for one thing.

Could you elaborate? Is there a actual way to make GVP work with this accelerator? Or is it more like a theoretical option?

Samurai_Crow · 11 October 2021, 23:55

You'll need to get the alternate design from someone other than me. I only know that the way DMA access works is that it activates tristate buffers on the address and data busses to shut down the CPU so the DMA device can manipulate memory independently of the CPU.

sparx · 12 October 2021, 09:25

Quote:

Originally Posted by Mathesar

I see no real reason why it wouldn't work. How did you stack the two boards? (what board is "under")?

Hi, just wanted to say nice work!
As GadgetUK mentioned, I've built a few of these (7 I think and supplied boards parts for 3 more) only had one failure
Tbh, I think that failure was board related...

sparx · 12 October 2021, 09:26

Quote:

Originally Posted by utri007

Correct ram works, but not IDE. If I remove accelerator it just works with ordinary 68000 cpu.

It is open source http://www.mklboards.fi/ide/ide68k.html

I have accelerator and IDE68K working on my test board
I find the biggest issue being connectivity with the CPU socket on the motherboard

utri007 · 12 October 2021, 15:19

Quote:

Originally Posted by sparx

I have accelerator and IDE68K working on my test board
I find the biggest issue being connectivity with the CPU socket on the motherboard

OK, thanks. This helps.

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09 October 2021, 07:31	#83
Mathesar Registered User Join Date: Aug 2014 Location: Netherlands Posts: 695	Shouldn't mask be set to all zero to disable DMA altogether? Eg 0x00000000 ?

09 October 2021, 07:52	#84
patrik Registered User Join Date: Jan 2005 Location: Umeå Age: 43 Posts: 922	The mask does not control DMA at all, it is just a condition of whether or not to re-route the device transfers through a memory area deemed safe (up to the file system what that is). The filesystem which uses the mask has no idea about wether or not the device will use DMA or not to make its transfers and will do the same for both PIO and DMA devices, so you can totally axe the performance of PIO devices by using mask too. Via the mask it knows that the driver should only be allowed to transfer data to/from memory matching it, which it will honor, so a mask of zero should in theory give a non-working partition, but it is possible the file system will default to something instead of zero. There is no standardized api call in devices to disable dma, there is only the mask hack to re-route transfers.

09 October 2021, 18:02	#85
utri007 mä vaan Join Date: Nov 2001 Location: Finland Posts: 1,653	I didn't find these with google Amiga HdToolbox mask values 0x5FFFFe should allow zorro II ram 0x1FFFFe should allow only chip ram How ever this acclerator doesn't work with GVP HD8+

10 October 2021, 01:39	#87
utri007 mä vaan Join Date: Nov 2001 Location: Finland Posts: 1,653	Just tried to make this work with MKL's IDE and it doesn't work. It some sort disables it, if connected. I have a working IDE with normal CPU, but with this is just doesn't see hard drive. http://www.mklboards.fi/ide/ide68k.html Wondering would this be easy to fix? Problem must be OVR or INT2 signal?

11 October 2021, 22:43	#95
Samurai_Crow Total Chaos forever! Join Date: Aug 2007 Location: Waterville, MN, USA Age: 49 Posts: 2,186	Tristate buffers for one thing.

11 October 2021, 23:55	#97
Samurai_Crow Total Chaos forever! Join Date: Aug 2007 Location: Waterville, MN, USA Age: 49 Posts: 2,186	You'll need to get the alternate design from someone other than me. I only know that the way DMA access works is that it activates tristate buffers on the address and data busses to shut down the CPU so the DMA device can manipulate memory independently of the CPU.

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