06 December 2021, 01:24 | #21 |
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06 December 2021, 08:12 | #22 |
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Do you plan to sell them? I would be very interested in one of those in original form as shown above.
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07 December 2021, 23:43 | #23 |
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I'm really interested, too !
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08 December 2021, 02:42 | #24 |
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08 December 2021, 05:12 | #25 |
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Keep in mind, the A4091 has really poor performance with an A3640 or a CSMK2. Usually around 5MB/s. If you have some Z3 RAM and it's promoted to highest priority it's somewhat better, closer to 7MB/s.
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08 December 2021, 05:33 | #26 |
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Hey, it's better than stock IDE. And better than no SCSI at all.
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08 December 2021, 05:49 | #27 |
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08 December 2021, 06:16 | #28 | |
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Quote:
Prioritizing Z3 (or motherboard) RAM has the same effect on my end (~7 MB/s, IIRC). However, even if data DMA'd in this fashion were to be beneficial in some sense (very large files?), you still have the problem of much slower CPU access to Z3/mobo RAM vs accelerator RAM, therefore, IMHO the latter is still best left at highest priority. Some devices such as the Fastlane and DENEB can work around Buster's issues and show greater raw transfer rates, but at the expense of higher CPU use and an overall more sluggish system (in fact, the Fastlane performs only slightly better than the 4091 if configured to keep the system generally useful during extended transfers). Last edited by Damion; 08 December 2021 at 08:46. |
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08 December 2021, 15:21 | #29 | |
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However if you are using an A3000 with an 030@25MHz on the motherboard, it should deliver somewhere in the range of 7-9MB/s with motherboard RAM and and appropriate SCSI drive. Last edited by grelbfarlk; 09 December 2021 at 05:30. |
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01 January 2022, 21:03 | #30 |
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Can’t the drive's bit mask be set to utilise Z3 RAM instead of a blanket priorisation of said RAM for all purposes?
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02 January 2022, 07:12 | #31 | |
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The mask setting works as you'd expect to limit to ChipRAM, 24-bit DMA, and 32-bit *anything* in say an A2000. In an A4000 with an accelerator or motherboard RAM highest priority is all that seems to matter with the A4091 or Fastlane. |
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02 January 2022, 08:55 | #32 |
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I think this is very cool it's being remade. Perfect for owners who have older SCSI controller's and disks they want to keep. There is however another generation of storage controllers coming along integrated into the newer CPU accelerators such as Vampire and PiSTorm which move the storage controller to the other side of the 680x0 bus. Here, closely coupled to the SDRAM controller gives performance that is medium limited (e.g. The max speed of an SD card). Only one classic storage controller did this before, Cyberstorm MK III/PPC
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02 January 2022, 14:23 | #33 |
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What sets the Cyberstorm Mk III apart from the Mk I or II, SCSI-wise?
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02 January 2022, 20:19 | #34 |
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03 January 2022, 01:23 | #35 | |
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There were far fewer that didn't. |
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03 January 2022, 02:14 | #36 | |
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If you simply want a faster computer, get a Raspberry Pi for the price of the NCR chip. But if you have something to contribute and and produce, or simply enjoy cool Amiga hardware in 2022, this project might be for you. |
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03 January 2022, 05:58 | #37 | |
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Quote:
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03 January 2022, 06:45 | #38 | ||
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Quote:
Quote:
The case of the overclocked Cyberstorm MK2 is a bit of an outlier (since most popular accelerators had their own disk interface of course), but even so, the 4091 is a good reliable performer, and certainly a frackload better than internal IDE. |
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03 January 2022, 12:19 | #39 | |
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The thing is that it is the applications that allocates the memory used to transfer data to/from a file on a filesystem. This will normally be allocated from the highest priority/fastest memory available, without any idea about which mask the partition the filesystem has mounted, containing the file to read/write from/to has. This is not because the programmer is lazy, it is just not practical to find out, plus if you are to do processing on that data, you don't want it in slower memory anyway. If some memory is beneficial for transfers with a specific controller, you would as said need to specifically allocate it in an application to get the increased transfer rate, but then again, if you are doing anything with the data later, you most likely don't want it there anyway. Setting the mask to anything more restrictive than what your storage controller hardware+software can manage without bugs will only hurt performance and never increase transfer speed. The whole idea with the mask is also just this - to be able to work around controller hardware/software bugs in a pinch. The same goes for the alignment part of the mask. Say you have a DMA controller which cannot do better than even longword alignment, like the A3000 onboard SCSI unless you have latest DMAC + Ramsey, then you would still want your mask to be 0xFFFFFFFF instead of 0xFFFFFFFC, so transfers to/from word-aligned addresses are handled by scsi.device via fast instead of getting the chipmem+small block treatment of FFS. This part can easily be tested with diskspeed. Last edited by patrik; 03 January 2022 at 12:28. |
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04 January 2022, 04:05 | #40 | |
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The GVP Trexx 040 gave the fastest result with the Fastlane at one point, above a CS MK2. |
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