29 April 2017, 01:34 | #1 |
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A1200/AGA Bus Bandwidth Curiosity Question
Hi Everyone,
Have a technical question about the A1200... I noticed that when I bump with the number of colors on the workbench screen from the standard 4 to 256, the redraw rate is very slow. I always assumed that this was because a stock A1200's '020 just couldn't keep up. I recently bought an ACA1233n accelerator ('030 @ 40MHz) and noticed that it is still slow at redrawing the desktop. Yes, it is slightly faster than a Stock A1200 but not as quick as I thought it might be. Is the effect I'm seeing related to the AGA bus being bandwidth limited or is the '030 still the bottleneck? (FYI, I'd love to hear any technical details about why. I am an electronics engineer by trade and love the juicy, intimate details about this stuff. I'm just not well versed on the AGA chipset.) Thanks. -Brian |
29 April 2017, 01:44 | #2 |
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Yes, the bitplane data is read from chip ram via dma, so CPU won't help much there.
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29 April 2017, 02:23 | #3 |
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Indeed, the custom chips read their data from chip RAM directly, so the CPU isn't normally involved. Also, this chip RAM is synchronous with the custom chip's own clock, which is ~14MHz on an A1200, and is critical for the generation of video and pretty much every other signal, so can't really be changed. The accelerator's clock can be more or less anything (in your case 40MHz), but that's local only to the accelerator board, and so only affects the CPU itself and anything else that's on the accelerator board (fast RAM, SCSI etc.); the motherboard clock is unaffected.
This also means that the accelerator still needs to access the chip RAM at the slower speeds by waiting for an available slot to access the chip RAM bus. The chip RAM bus is synchronised to the display, and to build the display, the blitter gets priority over the CPU. So if you've got a very busy display, it leaves very little time for the CPU to access chip RAM. Having fast RAM helps a lot, because the CPU can work away on its own thing in fast RAM while the blitter is working in chip RAM, but ultimately CPU access are always required to give the chipset new things to work on. With a 256 colour display, the blitter is pretty much maxed out, which is why there's very little bus time for anything else. Reducing the number of bitplanes increases the number of DMA slots available for other things, so it is really noticeable - even a 64 colour display is far faster than 256, and far slower than 4. The Amiga hardware manual has some more juicy technical details on the subject that you might find interesting Clicky |
29 April 2017, 11:05 | #4 |
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I can't top the explanation above, but if you have a HDD and want to run a more colourful workbench, there are a few clever hacks that can offload a lot of the work to the CPU and speed things up considerably.
I used FBlit, FText and BlazeWCP and they made a very noticeable difference! You'll find all three on Aminet - they also, due to using the processor and fastram for some functions, mean you'll be left with a lot more free chipram after boot The docs are fairly detailed, which makes for quite an interesting read if you want to know the why of how they work. |
29 April 2017, 13:16 | #5 |
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Indeed, god point about the patches. In a standard machine, the blitter is faster at copying around chunks of data in chip RAM than anything else. But if you have a faster CPU available, like an 030 or higher, the CPU is actually quicker at doing the transfers than the blitter, and so it makes more sense to use the CPU instead, which is what the patches mentioned do. Of course this means that some CPU time is taken by the operations instead, but for most purposes the trade-off is well worth it!
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29 April 2017, 14:57 | #6 | |
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Quote:
for 256 colors you need at least a 040/40mhz , kickstart located into fast ram and some WB patches like FBLIT to run it at descent speed yet will be not as fast as having a gfx card because the lame speed of the chip ram, a faster cpu would be necessary to compensate for this |
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29 April 2017, 15:47 | #7 |
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About 7 MB/s isn't too much to deal with...
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29 April 2017, 16:28 | #8 |
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Every 16 bit chip RAM memory access takes 8 14 mhz CPU cycles on a 1200. 32 bit ones take 8 cycles too. Compared to fast RAM the bus is 7 mhz. That's before DMA contention kicks in. It behaves more or less like the 500 but 32 bit wide.
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29 April 2017, 19:26 | #9 | |
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Quote:
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11 May 2017, 03:44 | #10 |
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Hi Everyone,
Sorry for the late reply. (I hate it when life gets in the way of my fun.) I read the "Clicky" to the technical documentation. That was very interesting on how the custom chips appropriate the bus cycles. I especially liked the part on how most of the 68K instructions fit perfectly within the time window allotted. That seems like a very clever trick to utilize available memory bandwidth. Unfortunately that trick works against you on faster CPUs. I had always assumed that at high resolutions and bit planes, the '020 processor in my A1200 just couldn't decompress the icons or move the data into the appropriate chip memory location fast enough. That is why I was taken back when the '030 accelerator didn't completely resolve the issue. It seems like the AGA should have been designed with a bit more bandwidth. Alas, the follies of Commodore at the end. I was unaware of the software patches that move the video work to the CPU. I will have to give those a try and see what kind of difference they make. As for having an '040... I would love one, but I'm just too cheap to pay the frankly insane prices being asked for '040/'060 accelerators. Again, Thank you everybody for the info. It was very enlightening. -Brian |
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