07 February 2009, 00:57 | #1 |
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Some screen corruption with JIT enabled
I have a small test-program which occasionally displays some bitplane corruption when the JIT is active in 1.5.3 and the latest beta.
I've inspected the bitplane data and it's valid, the corruption is only visible in the bitmap output. What happens is that there is a blank bitmap line inserted somewhere among the upper 10 lines, and the rest of the bitplane data is offset one line down. Configuration and exe here: http://zb.stolendata.net/test.zip |
07 February 2009, 01:40 | #2 |
Lesser Talent
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JIT has and never will be 100% guaranteed, Toni has always said that.
If it works without JIT I'd consider it fine! |
07 February 2009, 10:16 | #3 |
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I can't duplicate.
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07 February 2009, 10:30 | #4 |
Banned
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I never us JIT, no one should. It should ONLY be used if you REALLY need the speed (which should be never, I didn't even use it in 3D games like Genetic Speciec I think, still got full speed).
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07 February 2009, 10:47 | #5 |
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How useless reply. (Offtopic warning!)
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07 February 2009, 11:40 | #6 |
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It only appears rarely, maybe 1 in 20 runs. Sorry can't give any more details other than the config file and that exe. The error doesn't persist with state files.
I agree that the JIT shouldn't be used for anything than speeding some processes up. The Workbench is probably the only thing I actually use it for as it makes things very zippy. I wouldn't use it for games or any detailed tests, though I would never expect it to affect the video display emulation. BTW I noticed another thing while doing some tests. When I switch from fullscreen to fullscreen+v-sync in the display settings, the emulation slows down greatly. It's as if the CPU emulation normally runs in turbo speed during the vertical blanking, and the effect is canceled when you use v-sync. Is this expected behavior? Last edited by Leffmann; 07 February 2009 at 11:45. |
07 February 2009, 14:16 | #7 | ||
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Quote:
Quote:
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07 February 2009, 14:34 | #8 |
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I found another thing :P
Between vpos $138 and $0 the CPU seems to break the chipset timing. In this interval of 1 or 2 rasterlines I have enough time to do more than 300 000 longword moves from chipmem to chipmem. I understand this is because this interval will be longer than the real ~64us due to the speed of the emulation, but isn't it possible to limit the RAM access speed here? It would make for more realistic emulation of non-A500 systems. |
07 February 2009, 14:41 | #9 |
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JIT = fastest possible, accuracy isn't important. JIT runs in bursts, it can't be told to stop after n cycles, it will run complete translated block until it returns.
JIT directly access all memory, emulation can't detect if it is chip ram or fast or whatever ram access, it completely skips all normal memory accesses for best performance. Do not use JIT if you want timing accuracy or care about accuracy. |
07 February 2009, 14:54 | #10 | |
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Quote:
When using it I can get crashes, dodgy graphics, failure to load games, sound delay in recordings, sound errors etc etc etc. But it's darn good to have JIT as an option for when you need to run programs and stuff fast, to try things out.... |
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07 February 2009, 14:56 | #11 |
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The last example is without using JIT. A plain unexpanded A1200 configuration.
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07 February 2009, 15:55 | #12 |
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07 February 2009, 18:03 | #13 |
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07 February 2009, 19:07 | #14 | ||
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Quote:
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07 February 2009, 21:31 | #15 |
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Alright I understand it's not easily solved when it depends on the caches. At least this can be fixed programmatically, with a copper interrupt on one of the last lines holding until line 0 things should be fine.
Thanks! |
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