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Old 02 May 2017, 18:23   #61
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Originally Posted by jediknight View Post
a pc playing rebal assault and watcing the fantastic out of this world graphics seeing tie fighters and xwings i though holy hell amiga is dead and i was right , the amiga lacks the 3d acceleration graphics and that killed it
But Rebel Assault is a FMV shitfest with 2D sprites on top. No 3D happening, and BARELY improved Dragon's Lair-type gameplay.

I remember being gobsmacked by it back in the day, but have you tried to play it today? Not a good game at all, aged terribly. Like Megarace.

PS1 stuff was something else though, even if it looked like absolute shit (textures!)
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Old 02 May 2017, 21:07   #62
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Originally Posted by absence View Post
Does anyone know where she got them?
According to Jeri, "an Amiga engineer slipped me the schematics to the original chip set". The schematics themselves are shown in the youtube video also.

[ Show youtube player ]
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Old 20 June 2021, 09:03   #63
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Originally Posted by matthey View Post
We can do a little better armchair analysis of Hombre.

The "CPU chip" was doing most of the 3D, general purpose processing and could act as a logic controller.

The "CPU chip" included a PA-RISC (probably 7150@125MHz) with SIMD (maybe MAX-2?). It sounds like the SIMD was customized and used for 3D probably giving much of the performance.

There was probably a good relationship with HP as this sounds like a reasonable price. Perhaps C= finally made the deal they needed but too late.

Let's evaluate the PA-RISC 7150 (introduced in 1994) with SIMD. It was based on the PA-RISC 7100 using the same fab process but with improved circuit design to allow 125MHz. The PA-RISC was one of the first general purpose processors to include an SIMD called MAX which processed only 32 bits as 2x16 bit data at one time using a single instruction (1.9x to 2.7x fps speedup claimed for MPEG video, convolve 512x512, zoom 512x512 and H.261 video). MAX-2 could process 64 bits as 4x16 bit data at one time using a single instruction (likely 2x the performance of 32 bit MAX).

The PA-RISC 7100@99MHz (L1: 256kB ICache/256kB DCache) without SIMD could decode MPEG 320x240 video at 18.7 fps. My 68060@75MHz (L1: 8kB ICache/8kB DCache) using the old RiVA 0.50 decodes MPEG video between 18-22fps (average ~20fps). An update to the new RiVA 0.52 works now giving 21-29 fps (average is ~26fps with more 68060 optimization possible). Note that the PA-RISC 7100 was introduced in 1992 and used in technical and graphical workstations and computing servers while the 68060 was introduced in 1994 for desktop and embedded applications (less demanding and lower cost applications). The PA-RISC 7100LC@60MHz (L1: 32kB ICache/32kB DCache) introduced in 1994 with SIMD (initially 32 bit MAX but may have been upgraded to MAX-2 later?) could do 26fps decoding 320x240 MPEG. MAX not only improved the performance (finally better than the 68060 at MPEG fps) but improved the code density by replacing many RISC instructions allowing the cache sizes to be reduced tremendously. The PA-RISC 7100LC@80MHz (L1: 128kB ICache/128kB DCache) with MAX SIMD could do 33fps decoding 320x240 MPEG. The Apollo Core 68k@78MHz should be about the same performance, if not a little better, without using an SIMD (the Apollo Core with SIMD is likely twice as fast as the PA-RISC 7100LC@80MHz in MPEG decoded fps). As we can see, the PA-RISC had unimpressive performance even with an SIMD and lots of resources.


There were other 3D graphics chips which went on to use an SIMD processor in a somewhat similar configuration like the Broadcom VideoCore with ARM CPU as used in the Raspberry Pi. High end graphics boards eventually moved on to more specialized parallel processing units but have a logic controller CPU to process the I/O and feed the specialized units. It looks like this configuration allows more parallelization than an SIMD and scales better while the SIMD can be started quicker (less latency), is easier to program (relative as still not easy to program) and can improve code density (which reduces caches needed) if general purpose enough.

Could Hombre have saved C= from bankruptcy? Probably not as it was not far enough along in development. It was probably on par with the PS1 but wasn't finished so maybe would have had to compete with the PS2. Would C= have been pursuing the PA-RISC if they know now what the 68k could do as presented here? If they were smart, they would have been looking to license or buy the rights to the 68060 from Motorola (should have been cheap as it was undervalued and discarded for PPC) and perhaps add their own SIMD as it would have saved them the development effort of porting the AmigaOS to PA-RISC and they could have done it as a much prioritized effort to make a single chip Amiga (68k+custom chips) SoC. Then again, knowing C=, they would have probably tried to create a 68030 based SoC instead of 68060 based one as they lacked a tech savvy vision with good leadership.
PA-7100LC has an extra integer unit and is designed as a low-cost microprocessor for low-end systems.

The first systems to feature the PA-7100LC were introduced in January 1994. These systems used 60 and 80 MHz parts. A 100 MHz part debuted in June 1994

The PA-7100LC was based on the PA-7100. Major improvements were improved superscalar execution and an extra integer unit.

Superscalar execution was improved by adding the extra integer unit and modifying the control logic so that two integer instructions, two load-store units, or an integer and a load-store can be issued in one cycle in addition to the existing instruction combinations supported by the PA-7100

From https://www.wikiwand.com/en/PA-7100LC

68060 needs 0.6 micrometre process fab tech with 2,500,000 transistors. 68060 Rev 1 can be overclocked to 63 Mhz on TF1260 with ease.

PA-7100LC needs 0.8 micrometre process fab tech with 900,000 transistors. 1994 PA-7100LC at 0.8 micrometre process fab can reach 100 Mhz.

Each integer unit can support SIMD32 (2X packed INT16).

PA-7100LC at 100 Mhz would give 1994 Pentium 100 Mhz some heartburn but in 1995, Intel released classic Pentium 200 Mhz and Pentium Pro (up to three instruction issue per cycle, out-of-order processing) 200 Mhz.

0.8 micrometre process fab tech for Pentium 50 to 66.
0.6 micrometre process fab tech for Pentium 75 to 120.
0.35 micrometre process fab tech for Pentium 120 to 200.

Last edited by hammer; 20 June 2021 at 09:12.
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