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Old 09 May 2022, 07:38   #21
klx300r
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How about 8MB with other features
The dream Agnus that would be for my Rejuvenator A1000 board
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Old 09 May 2022, 08:44   #22
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Impressive stuff!!!!!
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Old 09 May 2022, 16:37   #23
kipper2k
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The dream Agnus that would be for my Rejuvenator A1000 board
Renee is the guru, i am looking after the hardware side.
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Old 10 May 2022, 01:45   #24
Niklas
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Nice, AGA ?
No, as Promilus pointed out, Agnus is OCS/ECS only.

Regarding your Gary implementation, are you planning to release the design as open source? I suppose the version that Matze released in 2015 already comes with source code, https://www.a1k.org/forum/index.php?threads/52455/. Still, the more open implementations of custom chips, the merrier.
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Old 10 May 2022, 11:39   #25
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Willoe will address as much of that RAM as we like and does not and cannot use the on-board ram anymore, it would be come vestigial

I assume you're there's an option for it to use the Ranger memory range + reserved so, 3.8M chip memory? That way there could be a fully Z2-compatible mode... And fully compatible with stuff that expects memory in Ranger range since chip memory would behave exactly like slowmem...

Going into Z2 range would definitely require a Gary board.

Last edited by AmigaHope; 10 May 2022 at 11:48.
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Old 10 May 2022, 16:35   #26
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No, as Promilus pointed out, Agnus is OCS/ECS only.

Regarding your Gary implementation, are you planning to release the design as open source? I suppose the version that Matze released in 2015 already comes with source code, https://www.a1k.org/forum/index.php?threads/52455/. Still, the more open implementations of custom chips, the merrier.
It will be released once more testing is completed and timings tweaked. tested on different motherboard/revs of all relevant Amigas
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Old 22 May 2022, 09:17   #27
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There are still some 5volt FPGA's out there.
I recently got some old Altera Acex in QFP208.
No need for the clamp diodes.
But yes it needs a ROM.

Otherwise Spartan 3AN with built in flash looks good as 8MB Alice! ;-)
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Old 22 May 2022, 18:59   #28
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I find using old, scarce and unsupported by modern tools ICs rather risky choice. Spartan 3 is 3V3 and so is Altera MAX10. You want RAM and flash embedded on FPGA? Go GOWIN. It still is 1.8/2.5V I/O (but with fairly small QFN or even better BGA you just might squeeze room for level shifters and LDO on PCB that fits the PLCC socket).
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Old 23 May 2022, 02:59   #29
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I find using old, scarce and unsupported by modern tools ICs rather risky choice. Spartan 3 is 3V3 and so is Altera MAX10. You want RAM and flash embedded on FPGA? Go GOWIN. It still is 1.8/2.5V I/O (but with fairly small QFN or even better BGA you just might squeeze room for level shifters and LDO on PCB that fits the PLCC socket).
I'll check out the Gowin chip. Do you know anything about their toolchain?
But 2.5v to 5v? Any better idea than two Quickswitch 245's in series?
Maybe level shift 2.5 to 3.3 LVCMOS and then clamp diodes to reduce CMOS to 3.3 for the QuickSwitch level shifter?


Spartan 3AN and Max10 both have built in flash, so they're like gian CPLD's with block ram
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Old 23 May 2022, 06:56   #30
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Oh toolchain, well, it works It's no Quartus though. However simplicity isn't all that bad.
Embedded pSRAM or SDRAM (depending on chip version and package) is quite fast as well and that also leaves more room on PCB for e.g. 20bit bus switches. It takes plenty of I/O pins though... let me see... Agnus 16 for Data, 16 for DRAM data, ~20 for Address, ~8 fr RGA and ~20 for other signals. DRA and CAS/RAS unused due to on-die RAM. That's around 80 essential signals for ECS Agnus. Alice on the other hand is different cookie. AFAIK it shares CHIP RAM control functionality with BUDGIE. So while you can easily make Agnus+CHIPRAM module and just hook up few additional address lines it doesn't seem as easy with Alice.
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Old 26 May 2022, 18:02   #31
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Here is an update on what is being worked on...

https://www.buffee.ca/a-little-side-project/
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Old 27 May 2022, 18:08   #32
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Some time ago, designs for replacements of Gary (7B-5719) and CIA (working name ReCIAakaKGB and completed in 80%) were created.





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Old 27 May 2022, 18:18   #33
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wow, the cia is massive i have seen one done using a smaller xilinx, not sure it it 100%. Can this one be made to work with a smaller chip ? (KGB) interesting name, a play on cia/kgb lol. Did you stop dev on the cia, we are going through all the custom chips, if you are willing to show progress to date we would be interested in trying to complete it. Our Gary appears to be 100% now on a500, just adding a couple of small chips to add a2k compatibility

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Old 28 May 2022, 01:38   #34
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k, new WIP New CIA


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Old 28 May 2022, 01:55   #35
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in black...



made a slight design change to Gary to accommodate the a2k, boards going in on Monday

Last edited by kipper2k; 28 May 2022 at 02:09.
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Old 28 May 2022, 03:19   #36
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So are these replacements going to be open sourced, or stay closed?
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Old 28 May 2022, 08:53   #37
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My CIA replacement in its current phase already allows AmigaOS to run and pass most of the tests (still missing TOD counter implementation).
https://twitter.com/arturgadawski/st...04588000223238

7B-5719 (Gary) is fully functional (working with turbo cards and also in A2000).
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Old 28 May 2022, 09:04   #38
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wow, the cia is massive i have seen one done using a smaller xilinx, not sure it it 100%. Can this one be made to work with a smaller chip ?
I used XC95288XL in this prototype and it is 94% full. Therefore everything related to TOD counters does not fit in it.
I have to use a capacious CPLD/FPGA chip in new version of the prototype.
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Old 28 May 2022, 15:52   #39
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@kipper2k

What chip is on the CIA replacement? Given there is a crystal oscillator on there I would guess it is a microcontroller. Would make sense, the E clock is so slow that almost anything can keep up. Some clever and fast interrupt code triggered by E/VMA?
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Old 28 May 2022, 16:16   #40
kipper2k
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@kipper2k

What chip is on the CIA replacement? Given there is a crystal oscillator on there I would guess it is a microcontroller. Would make sense, the E clock is so slow that almost anything can keep up. Some clever and fast interrupt code triggered by E/VMA?

we're not ready to talk about which chip it is since the code isn't done yet, but CIA needs a lot more than most CPLDs can handle, especially at the physical size we're talking about for DIP
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