14 April 2014, 16:32 | #1 |
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Demo Coder Challenge - Vampire Beta Project !
Hi,
We prepare a new CPU load for the Vampire. This CPU load is relative fast. In addition to this, the CPU has some unique features. If clever used you can get __really__ good performance with them. As with every CPU to use to to the maximum a skillfull code is needed. :-D I'm looking for some interested ASM coders which like to beta-test the core and which like to create some demos for it - which really push it to the limit. In theory a demo could of course also be coded without having access to a Vampire yourself. But to be able to later beta-test the core a Vampire card would be usefull. Please ping me if you are interested. |
14 April 2014, 20:15 | #2 |
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So the phoenix core for the vampire 600 is ready and functional?
I offer myself to try on my amiga ! |
14 April 2014, 20:29 | #3 | |
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The core is working - but not all instructions are tested yet. This will take time to test all. This month you can NOT expect to just run any Amiga game. But nevertheless you can savely write programs which use the tested instructions. Your programs will work correctly. This way you could write stuff like 4K demos which work both correct and fast. You could "load" those demos into the card and you could execute them. It would be nice to create some demos which really challenge the core. Maybe a high quality texture mapper, or a real time fractal generator. The more CPU challenging the better Like writing the "Juggler demo" but maybe this time rendered in real time :-D If you like to code som ASM demos. First maybe small ones ... To help to test and benchmark the core then this help would be appreciated. I will provide a complete list of available instructions, timings, and special features that can be used. Cheers |
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14 April 2014, 20:37 | #4 |
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Secrets, mysteries, x-files... lol - not being a coder i'm curious about those new features - any chance to less secrets? (ignore this message if this is commercial product then no need to explain why is so secret)
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14 April 2014, 20:41 | #5 | |
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Until then features could still come in / or out. |
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14 April 2014, 21:50 | #6 |
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Can you at least "whet the appetite" with an example or two of what special tricks this core has up its sleeve?
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14 April 2014, 22:28 | #7 |
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unfortunately I do not know the ASM ...
I'd like to know if with this core You can now boot and start the workbench... |
15 April 2014, 00:22 | #8 |
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15 April 2014, 07:48 | #9 |
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15 April 2014, 08:46 | #10 |
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The CPU is an 68K CPU, therefore normal AMIGA development tools all work.
This means you can write a normal demo which can run both on any classic AMIGA and on Phoenix/Vampire. The CPU can be emulated in a VHDL development tool (e.g. Modelsim or Cadence). This is might be useful for analysis of certain high performance loops - as you can this way see a lot of internal information like Cache-misses, Memory-Prefetches etc. So if you write for example a texture mapper and wonder if there might be options to tune the code then I can analyse the workloop and create a pipeline diagram showing you bubbles or options to tune the code, |
15 April 2014, 09:00 | #11 |
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15 April 2014, 09:12 | #12 | |
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So, for testing you could just use current 060 demos and see if they run at a better frame rate |
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15 April 2014, 09:18 | #13 | |
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Is your texture mapper integer code only? How do you calculate the texture coordinates, do render lines with constant distant to the viewer and therefore only "add-up" texture coordinates. Or do you render next pixels on the screen and either have to cheat on the exact texture coordinate or do you use a DIV/SQRT per pixel? Is your texture rendering loop already unrolled to be able to take part of OoO CPU features? How do you do the C2P conversion? Do you use a seperate task for this which could be ran as hyperthread easily? |
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15 April 2014, 09:23 | #14 | |
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Unless the new core adds some useful new instructions, there's no point in rewriting the texture mappers if there's a risk it will lead it to perform worse on an 060. |
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15 April 2014, 09:27 | #15 | |
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Is the perspective for the linear corrected of some pixels or never? What would you say is the buiggest "bottle" neck on the 68060? Is it CPU power, or is it memory latency /bandwidth? |
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15 April 2014, 09:31 | #16 |
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15 April 2014, 09:46 | #17 | |
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E.g for example you calc to pixel im parallel and when one does the memory read you do the color/light mixing of the other. This way the memory latency would be 100% hidden and your texture fetch is only 1 cycle. Would you say this would improve perfromance a lot? Are sources of your routines available somewhere? |
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15 April 2014, 11:58 | #18 |
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Aaaah i see your point now - from my side two proposals (sadly - not like you expecting) - perhaps something like RPTx from TMS320 can be added (repeat single and repeat block) this should be not resource intense, i would go also for real barrel shifter maybe increase twice amount of registers (two banks, fast context switching), probably also MAC instruction can be nice to have (perhaps coprocessor interface similar to 68882?)
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15 April 2014, 13:02 | #19 |
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I think a good coder could do on the Vampire/A600 something like:
real time fractal renderer which runs in : Hires-Interlaced 640x480 with 16 colors and 60 FPS Ah no does not work - we can not get the other halve of the bus bandwidht Thats a pity we have a fast CPU but the chipset still limits our options. The best options for display that I see are running somehting like Lowres EHB for games in 25 FPS. This should work fine. Last edited by Gunnar; 15 April 2014 at 17:28. |
15 April 2014, 13:21 | #20 |
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