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Old 01 September 2007, 21:47   #1
narmi
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Lightbulb Interest in 8MB FastRAM expansion for A500?

I'm working on an 8MB FastRAM expansion board for my A500, based on the design created by John Kamchen that is posted on Aminet (and in this thread). My design uses a single 8MB 72-pin SIMM for the DRAM, and plugs into the side expansion port of the A500. I've added the ability to autoconfigure too.

However, I've designed the board to fit inside the A500 instead of sticking out. It's a tight fit, but I think I've designed a board that is small enough. It plugs in at a right angle, so it sticks up, perpendicular to the motherboard.

Is anyone here interested in buying one of these? I ask because I'm planning on having 5 boards professionally made. If there is interest, I'll also buy enough parts to populate all of them so that I can sell them.

If you are interested, how much would you be willing to pay for a fully assembled and tested board with 8MB RAM installed? Your replies are much appreciated so I can figure out if this is worthwhile to pursue.
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Old 01 September 2007, 21:55   #2
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@Narmi

I would certainly be interested in buying one, either as a kit / assembeld or even a pcb-it yourself at home

I would love to develop or help develop to sometihng like this for an a600.
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Old 02 September 2007, 14:14   #3
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I'm praying for a A600 version, I would buy one too either as a kit or even assembled, I would also be interested in a A500 board, I think what most people want is a RAM expansion AND a CPU upgrade on the same board, as I assume mixing different boards for things or using 2 at once may unleash some really weird and obsure bug knowin my luck...

Edit : How much fast RAM can you have anyway in theory? (I presume the system can only address so much anyhow)

Last edited by DrF; 02 September 2007 at 14:16. Reason: A little question
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Old 02 September 2007, 14:47   #4
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@DrF

hmmm well the ammount of ram on the board depends on the complexity of the controller used. arguably the limmits would only be imposed by controller on the board.

But i am assuming that by not using PAL's / GAL's or custom chips (i.e. sticking to 74xxx's i think will hit the internal memory space limmit of the 68k moto of 8MB. on the A1200 and the A600 this would overwite the memory area reserved for the PCMCIA port.
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Old 02 September 2007, 16:23   #5
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Ultimately the address range that the processor can see limits the maximum amount of RAM you can install.

Also remove from that all the custom chips and ROM and other restricted areas.

Many of the custom chips are not accurately address decoded, so you lose some more address space there.

So 8MB FAST it is for a 68000 machine. If it were feasible to add more, we'd have seen expansions like that in the 90s.
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Old 02 September 2007, 16:58   #6
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"640K ought to be enough for anyone"

So I guess all them Blizzard, Appollo etc. boards have there own memory controller which lets them have 8mb+.

I would say 4/8Mb fast ram is enough anyhow.
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Old 02 September 2007, 18:24   #7
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So I guess all them Blizzard, Appollo etc. boards have there own memory controller which lets them have 8mb+.
68000/68010/68EC020 = 24bit address bus = 16M max address space (space for 2MB chip + 8MB fast + 1.8M slow, rest is used by io, rom, custom chips, cias etc, space for extended roms, autoconfig etc..)

68020+ = 32bit address bus = 4G max address space (but practical max is 2G)
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Old 02 September 2007, 18:37   #8
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Ah, yes the CPU how could I have forgot that detail
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Old 03 September 2007, 02:00   #9
narmi
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If this design works, I'm planning on adapting it to work in an A600. I'm going to go ahead and have 5 boards made, hopefully I'll be able to sell three or four of them so I can cover my costs and fund the development of the A600 variant.

Would you be willing to pay $50 for a kit? The kit would include the PCB, a SIMM socket, a card edge connector, a PLCC socket (for the autoconfig ROM), the 14 SMD chips required (including the programmed ROM), and one 8 MB 72-pin SIMM.
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Old 03 September 2007, 02:22   #10
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most certainly put me down for atleast one

I wonder if it could be combined with this little realization.

http://eab.abime.net/showpost.php?p=354777

I would like your overview on this, and to consider the feasbility of combining this with a memory upgrade, I feel i have followed the schematic faithfully but another set of eyes really would help.... I think the scairest thing is the fact I understand it LOL (for the most part )

If i could be sincerely honnest I could use some information or even recomendation on a delay circuit for the 7Mhz Line (about 35ns is needed ) as i want to create a CDAC signal... but the htread explains it a bit better.

I have been thinking about developing an A500 expansion port (esq.) for the A600... hmmm space is a serious constraint on the A600 though.... hmmmies.... *ponders*

Last edited by Zetr0; 03 September 2007 at 02:52.
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Old 03 September 2007, 07:26   #11
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well, i suppose it will works in A1000 too, and for 50 bucks i want one!
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Old 03 September 2007, 08:10   #12
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It should work in an A1000, but it might block the mouse/joystick ports. I'll check once I've finalized the board layout.

@Zetro: Because of all the logic chips involved, it would be best to use a CPLD to implement all the logic for the DRAM controller and the clock generation if this board is to be combined with your accelerator. I need to find a suitable CPLD that operates at 5V (most use 3.3V now). One CPLD can implement all of the 74xx logic chips for both projects.
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Old 03 September 2007, 09:53   #13
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@Narmi

/me reaches for CPLD book page 1...

its a mighty big book.... with a mighty ammount of reading LOL....

but I would like to design / develop an 020 / 030 upgrade in the near future and a CPLD would be the only REAL way to go, although it could be done using 74xx logic it would take to much PCB real-estate to fit in an A600...

I have been looking into spartan3 chips too..... not sure why .... they interest me , I have been playing arround with CADSTAR ( http://www.cadstarworld.com/ ) seems interesting... if a little awkward at first... it has some nice testing features.. especailly when it comes to CPLD's and Spartan series micro-controllers... AND ITS FREE .... I love it when its cheaper than cheap!
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Old 03 September 2007, 10:41   #14
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$50 BARGAIN! (I'd take 1 at least)

I presume we would have to assemble it ourselves though? (or a fee for preassembled)
Some questions :

Would it work in a A500+?
Compatible with trapdoor expansions (I'm sure I had a 2Mb chip ram 500+ somewhere)

Last edited by DrF; 03 September 2007 at 10:43. Reason: The wants and needs of the people :)
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Old 03 September 2007, 14:44   #15
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If it is just a RAM I'll help out, I've done quite a bit in this area. The 680x0 bus to DRAM converter is very simple.

I did it using less than 32 macrocells, and was even able to put a few multiplexers in there and save one or two 74LS257's.

Mine was for a CD32 FastRAM expansion.
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Old 03 September 2007, 18:09   #16
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@alexh

mentioning something similarly related could you build a delay line into a CPLD? either that i would appreciate any help in building a delay circuit
(need to create a CDAC signal from a 7mhz clock by reducing by 35ns)
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Old 03 September 2007, 20:33   #17
narmi
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Quote:
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$50 BARGAIN! (I'd take 1 at least)

I presume we would have to assemble it ourselves though? (or a fee for preassembled)
Some questions :

Would it work in a A500+?
Compatible with trapdoor expansions (I'm sure I had a 2Mb chip ram 500+ somewhere)
Yes to both questions. I'll have to see how long it takes to assemble and test before I figure out how much extra that should be (maybe $15 extra). And it should work in a 500+, I do have one that I can test with.
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Old 03 September 2007, 21:01   #18
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@Narmi $15 for assembly is cool, I will be following how this goes

This board has some VERY helpfull and VERY intelligent people
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Old 04 September 2007, 10:11   #19
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mentioning something similarly related could you build a delay line into a CPLD?
Isnt CDAC just C7M with a 90' phase shift? You dont really want to implement a traditional delay line then, you want a clock phase shifter, probably easy to use the built in DLL/DCM or whatever hardware assist there is in the CPLD for clocks. Find out what CPLD you intend to use first, see what hardware assist we have.

Last edited by alexh; 04 September 2007 at 10:22.
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Old 04 September 2007, 13:13   #20
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@Alexh

Indeed a CDAC is a C7M with a 90' phase shift.

I discovered this after developing a cycle safe 14Mhz for the 68k moto from Livio Plos original Schematic. It recomends a 32ns delay to that would provide a useable CDAC signal

Although there were many MUCH Simpler brute force designs, these often left the Amiga with *issues like CIA's running at twice the speed and hence serial communications running at double the selected speed!, incorrect XOR'ing and Floppy drives not able to keep up. (a whole bag of not worth the hassle)

I am still learning a lot of these designs, but i have many books and the power of every known internet search engine, and then I have the wealth of knowledge HERE!!!!

As Narmi is develoiping an Auto-Configured Memory expansion, I wanted to atleast develop something that maybe usefull to him.... the only problem is.... 12mhz and 16 mhz 68k moto chip sourcing.... kind a slim pickings these days... although i did manage to score a result with a 68000NF16 the other day for under £4
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