Amiga audio hardware trivia

[Toni Wilen]

(difficulty level: too difficult?)

A6 = $DFF000
Interrupts disabled (not really important)
Audio DMA disabled
Audio channel 0 register contents: random, anything works.
INTREQ cleared
Current hpos/vpos: can be random, no difference

move.w #$8001,$96(a6) ; enable audio channel 0 DMA
move.w #$0001,$96(a6) ; disable audio channel 0 DMA

INTREQ audio channel 0 interrupt bit gets set after DMA is cleared. Delay before interrupt gets set can be up to one scanline...

Why?

Illogical, isn't it? But this is not a trick question. (above really happens, check for example Murder or Mission Elevator), also HRM audio state diagram is correct.

(yaqube: you are not allowed to answer! )

[Asman]

Hi Toni,

I've no idea, but I checked Mission Elevator in Resource.

You mean about below code ?

; offset $1912 ( original mission elevator )
; hunk 11 ( offset $27a )
;
		move.w	#$8001,$dff096

		move.l	d0,-(sp)
		move.w	#$80,$dff09c
.loop		move.w	($dff01e),d0
		btst	#7,d0
		beq	.loop
		move.w	#$80,$dff09c
		move.w	#$8080,$dff09a
		move.l	(sp)+,d0
		move.w	#$80,$dff09a
		move.l	d0,-(sp)
		move.w	#$80,$dff09c
.loop1		move.w	$dff01e,d0
		btst	#7,d0
		beq	.loop1
		move.w	#$80,$dff09c
		move.w	#$8080,$dff09a
		move.l	(sp)+,d0
		move.w	#$80,$dff09a

		move.w	#$1,$dff096

Regards
Asman

[Toni Wilen]

Originally Posted by Asman

I've no idea, but I checked Mission Elevator in Resource.

You mean about below code ?

Yeah and I remembered wrong, this does not do "enable dma, disable dma" but fortunately this is still on-topic, it has a bug and it only works because of side-effect of this feature

(enable DMA, clear audio interrupt request, wait for interrupt request.. -> there has to be some kind of delay..)

Murder (US Gold) is guaranteed to do it, thunder sound when game starts.

[Asman]

Originally Posted by Toni Wilen

(enable DMA, clear audio interrupt request, wait for interrupt request.. -> there has to be some kind of delay..)

How long I should wait after clear audio interrupt request ?
Slowdown trick like test some cia register will work in this case ?

Edit: If I find some time today evening I will check Murder in Resource.

[Toni Wilen]

Originally Posted by Asman

How long I should wait after clear audio interrupt request ?

Interrupt delay: minimum of ~14 color clocks, maximum of ~242 CCKs.

Easier question: Explain this delay.

[Asman]

Originally Posted by Toni Wilen

Easier question: Explain this delay.

Because once each horizontal line DMA requests are transfered to the Agnus, and the data comes back about 14 clock cycles later. ( I found in HRM ). This exaplain minimum of the delay. Now maximum: With bad luck we will wait about ~228 CCKs ( PAL scan rate ) + above 14CCKs = ~242 CCK's.

[Toni Wilen]

Originally Posted by Asman

Because once each horizontal line DMA requests are transfered to the Agnus, and the data comes back about 14 clock cycles later. ( I found in HRM ). This exaplain minimum of the delay. Now maximum: With bad luck we will wait about ~228 CCKs ( PAL scan rate ) + above 14CCKs = ~242 CCK's.

Correct

Horizontal position = 0: Paula's DMA requests are transferred to latch and then moved serially to Agnus (this is the mysterious DMAL line)

Above should help answering the first question

Hint: DMACON audio and disk bits are ignored by Agnus...

[Asman]

Hm..... Its too hard for me.

First at all I must figure out what mean code which I posted. I think ( If I remember correctly ) that this routine waits till audio channel 0 finish playing sample, right ?

Regards

[Toni Wilen]

More like it waits until sample _starts_ playing

I thought my Agnus ignores disk and audio DMA enable bits comment would have resulted in some replies..

[Toni Wilen]

Bah, I knew it was too difficult

Answer (get your HRM audio state diagram page open)

move.w #$8001,$96(a6) ; enable audio channel 0 DMA
- channel 0 audio state machine changes to state 1
- AUD0DR set (channel 0 DMA request = true)

move.w #$0001,$96(a6) ; disable audio channel 0 DMA
- channel 0 audio state machine resets back to state 0

The end? No, now it gets interesting..

AUD0DR is still set. During next horizontal sync all AUDxDR and AUDxDSR signals are latched (after latching AUDxDR and AUDxDSR are immediately reset) and sent to Agnus via DMAL line (one bit per CCK)

Agnus notices channel 0 DMA request and does normal DMA fetch from memory (from whatever address was left in AUD0PT inside Agnus) to AUD0DAT. DMACON audio bits are ignored by Agnus. (DMA master bit has to be set)

Paula notices that AUD0DAT was written. Because DMACON channel 0 DMA bit is zero, Paula sees it as a non-DMA mode AUD0DAT access (normally done by CPU) and audio channel 0's state jumps to state 2 which generates audio interrupt.

Simple

(DMAL sends disk DMA requests before audio but it isn't important here)

[Photon]

OK, very tired and have only scanned the thread but...

Audio slots are at beginning of scanline.

vhpos is at random position when DMA enabled. State is set to 'will play sample'.

DMA is disabled immediately after in the code. Audio goes into DMAless playing. Interrupt scheme changes from 'every loop' to 'every sample word'.

Next sample word causes an interrupt at the aforementioned audio slot at beginning of line, which can be 14-224 cycles off depending on when the DMA set/clr instructions are called.

Probably too quick conclusion but anyway.

[Toni Wilen]

Something like that

Some more possible surprising features (it is obvious at least if you carefully check audio state diagram but it still is easy to miss):

In non-DMA mode Paula does not care about AUDxDAT (after initial startup), only requirement to keep state machine toggling between states 2 and 3 is to clear INTREQ fast enough (before state 3 period expires)

You could even use it as a CIA-like timer

(note that this didn't work correctly in emulation until 2.3 betas..)

[Toni Wilen]

I didn't feel lazy enough, pointless "timer" example:
(really minimal ugly code)

	lea $dff000,a6

	move.w #$4000,$9a(a6) ; kill interrupts (ugly)
	move.w #$0080,$9c(a6) ; clear aud0 interrupt
	
	move.w #2220,$a6(a6) ; "timer" value (period)

;	move.w #$8001,$96(a6) ; aud0 dma on
;	move.w #$0001,$96(a6) ; aud0 dma off
	move.w #$0000,$aa(a6) ; AUD0DAT (or uncomment 2 previous lines)

	move.w #$000,d2
	move.w #$080,d1

l1	move.w $1e(a6),d0
	btst #7,d0 ; audio channel 0 interrupt?
	beq.s l2
	move.w #$0080,$9c(a6) ; clear it
	exg d1,d2 ; swap background color values
l2	move.w d2,$180(a6) ; background color
	btst #6,$bfe001
	bne.s l1

	move.w #$c000,$9a(a6) ; restore interrupts
	rts