16 January 2022, 11:17 | #1 |
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One .h file for multiple .c files?
Hello,
I guess this is more a question in relation to make. At the moment I have organized a program with a header file for each source file. So if I have common.c then I have common.h. Now, it is not a must must, but I would like to have a single header file which exposed functions are implemented in multiple source files. In CMake I would achieve this through the add_executable command. Code:
add_executable(App main.c hello.h hello1.c hello2.c) However I cannot see how to replicate using make. Anyone has any advice? |
16 January 2022, 11:37 | #2 |
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Code:
App: main.o hello1.o hello2.o gcc $^ -o $@ %.o: %.c gcc -c $< -o $@ main.o. hello.h hello1.o: hello.h hello2.o: hello.h |
16 January 2022, 13:54 | #3 |
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aaa... I need an object file for hello1 and hello2... thank you for the example, that was really helpful and managed to get it working like that.
by any chance is there a way how I can join multiple object files into a single object file? Or I need to enter into library world for that? Reason I am asking is to see if I can organize my compilation rather than dump everything when building the executable. |
16 January 2022, 15:32 | #4 | ||
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It's not strictly needed to use object files, but it significantly decreases compile times. If you change only one source file, you need to recompile only that file and can then link the app from the existing object file plus the updated one.
If you don't use object files, you have to recompile the whole project for every change. This will take a lot of time, depending on the size of your project. Quote:
If you use an Amiga compiler like SAS, Dice or VBCC, then you can just concatenate all .o files into one .lib file using the AmigaDOS Join command. If you use GCC, you use the ar command to create a .a file. In either case you can just mention the .lib resp. .a file on the compiler command line to add all objects at once. Quote:
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16 January 2022, 23:33 | #5 |
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Not sure what I am doing wrong?
I have updated my make file as follow; Code:
all: App %.o : %.c vc -c -o $@ $< hello : hello1.o hello2.o join $^ hello.lib App : hello main.o vc $^ hello.lib -o $@ $(LIBS) main.o : hello.h main.h hello1.o: hello.h hello2.o: hello.h |
17 January 2022, 09:02 | #6 |
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If you put an "echo" command just before the "join", it will output the command it would run so you can see what arguments it is passing to join.
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17 January 2022, 09:20 | #7 | |
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Quote:
Apparently your shell uses a different path with additional third-party commands. The original C:Join command requires a "to" or "as" keyword and does not output anything. |
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17 January 2022, 09:46 | #8 |
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I was running make from ZSH. I have changed from join to C:join and it worked.
Many thanks for all the help. Now my make file looks more organized ... and learned some new stuff as well. |
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