17 April 2022, 12:46 | #1 |
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X-Copy bootblock analysis
I have been learning how to code and read/write bootblocks recently. Inspired by this old EAB post, I disassembled an X-Copy bootblock to see what I could learn (I really wanted to figure out if the OS was used to display text in the bootblock).
I've analysed the disassembly as best I can, but I may have made some mistakes, and there are a couple things that I don't understand or may be genuine errors or bad practice. Sorry for all the questions, and thanks in advance for any insight to help me progress. I've attached the original bootblock binary, as well as my disassembled and annotated sources. 1. Playfield data and copperlists use unallocated Chip RAM (near top of 512kB range). Is it safe to do this? Are the used memory ranges well known at boot time? 2. The copper DBF loop counter looks incorrect. The copperlist starts at offset $E0 and is 26 ($1A) long words so would expect D0 to be set to $1A-1=$19 before the start of the loop, when instead it is set to $1E 3. It looks like the Copperlist sets an invalid value for BPLCON2: PF2P 101 seems to be undocumented. 4. When DMACON is written by CPU to enable bitplane DMA (BPLEN bit 8), why is bit 9 (DMAEN) also set? 5. Why does the bootblock look truncated? Last string looks clipped. Bootblock is less than 1024 bytes, but checksum is fine. 6. Why is BPLCON0,COLOR (Composite video COLOR enable) set? And why is it set twice? Is this just the default value? 7. What is the best CPU-independent way to replace the software delay loop? CIAB TOD? 8. What is the reason for the single byte of $ff between GfxName and text? Is it an 'even'? Is there a reason to word-align the text for the call to Text()? Code:
; Created by using X-Copy 6 Install command on real Amiga 1200 and ripped with ReadBootblock ; ; $7EE00 RastPort, rp_SIZEOF=$64=100 ; $7EE50 BitMap, bm_SIZEOF=$28=40 ; $7EE80 Copper list? ; $7EF00 BitMap.bm_Planes,8*4 (max 8 planes * 4 bytes per pointer) size = (320/8)*8 = 320 bytes = 80 long words ; ; RastPort at $7EE00 and size $64 will overlap BitMap at $7EE50. ; However, if GFX_RASTPORT_1_2 is defined then RastPort size will be reduced by 22=$16 ; to $4E. So it looks like this bootblock may be designed for KS1.2 ; ; TODO: ; - Use assembler directives EQU and * to calculate copper list length in long words ; --------------------------------------------------------------------------- ; Constants ; n.b. Can't have any space between oprands e.g. A+B is fine, but A + B is not! BIT_PLANE_WIDTH_PIXELS EQU 320 BIT_PLANE_HEIGHT_PIXELS EQU 8 BIT_PLANE_WIDTH_BYTES EQU BIT_PLANE_WIDTH_PIXELS/8 BIT_PLANE_SIZE_BYTES EQU BIT_PLANE_WIDTH_BYTES*BIT_PLANE_HEIGHT_PIXELS BIT_PLANE_SIZE_LONGS EQU BIT_PLANE_SIZE_BYTES/4 ; n.b. 512kB Chip ram is [0,0x7FFFF] COPPER_LIST_ADDR EQU $7EE80 BIT_PLANE_ADDR EQU $7EF00 ; --------------------------------------------------------------------------- ; BB Header dc.b 'DOS',0 ; BB_ID - Always has to be DOS\0 dc.l $4E7852AA ; BB_CHKSUM - Fix up with FixBootblockChecksum after assembling dc.l 880 ; BB_DOSBLOCK - Rootblock location for DOS disks ; --------------------------------------------------------------------------- ; BB_ENTRY ; Open graphics.library lea GfxName(pc),a1 ; "graphics.library" moveq #0,d0 ; any version jsr -552(a6) ; Exec _LVOOpenLibrary(A1=libName, D0=version) -> D0 library pointer movea.l d0,a6 ; A6 <- GfxBase ; InitRastPort movea.l pRastPort(pc),a1 ; A1 <- pRastPort jsr -198(a6) ; _LVOInitRastPort(A1 = RastPort*) ; InitBitMap movea.l pBitMap(pc),a0 ; A0 <- pBitMap moveq #1,d0 ; depth = 1 bitplane (byte) move.l #BIT_PLANE_WIDTH_PIXELS,d1 ; D1 <- BitMap width moveq #BIT_PLANE_HEIGHT_PIXELS,d2 ; D2 <- BitMap height jsr -390(a6) ; graphics _LVOInitBitMap(A0=bm, D0=depth, D1=width, D2=height) -> void ; Set RastPort BitMap movea.l pRastPort(pc),a0 ; A0 <- pRastPort movea.l pBitMap(pc),a1 ; A1 <- pBitMap move.l a1,4(a0) ; pRastPort->rp_BitMap <- pBitMap (rp_BitMap is at offset 4) ; Set BitMap Planes movea.l #BIT_PLANE_ADDR,a0 ; A0 <- BIT_PLANE_ADDR (literal value) move.l a0,8(a1) ; pBitMap->bm_Planes <- BIT_PLANE_ADDR (see gfx.i) ; Clear planes (80 long words) move.w #BIT_PLANE_SIZE_LONGS,d0 ; D0 <- Plane size = (320/8)*8 = 320 bytes = 80 long words clearLoop: clr.l (a0)+ ; zero 4 bytes dbf d0,clearLoop ; Move() pen in preparation for drawing text movea.l pRastPort(pc),a1 ; A1 <- pRastPort moveq #55,d0 ; x = 55 moveq #6,d1 ; y = 6 jsr -240(a6) ; graphics _LVOMove(A1=rp, D0:16=x, D1:16=y) ; Text() movea.l pRastPort(pc),a1 lea text(pc),a0 moveq #$19,d0 ; string length = $173-text=$19 jsr -60(a6) ; graphics _LVOText(A1=rp, A0=string, D0-0:16=length) ; Set up custom Copper list movea.l #COPPER_LIST_ADDR,a0 ; A0 <- copperlist dest Chip RAM address movea.l a0,a2 ; A2 <- copperlist Chip RAM address lea copperList(pc),a1 ; A1 <- copperlist data src address moveq #$1E,d0 ; copper list length - 1 in long words. $1E long words = length $1F = $7C (124) bytes ; TODO: This value looks wrong. Should be COPPER_LIST_LENGTH_LONGS-1=$19 copLoop: move.l (a1)+,(a0)+ dbf d0,copLoop lea ($DFF000).l,a0 ; A0 <- custom chip base $DFF000 move.l a2,$80(a0) ; Set COP1LC ($DFF080) to point to new copperlist in Chip RAM clr.w $88(a0) ; Strobe COPJMP1 ($DFF088) to make copper jump to new location immediately (instead of waiting for next VBL) move.w #$8300,$96(a0) ; $DFF096 = DMACON ; Software delay loop! Obviously designed for 68000. ; A1200 68020/68030 instruction cache causes this to execute in the blink of an eye ; TODO: Replace with CPU-independent delay or wait mouse click moveq #$C,d1 ; D1 <- arbitrary loop counter delayLoop: nop dbf d0,delayLoop dbf d1,delayLoop ; Restore old copperlist move.l $26(a6),$80(a0) ; Set COP1LC ($DFF080) <- gb_copinit (GfxBase+$26) clr.w $88(a0) ; Strobe COPJMP1 ($DFF088) to make copper jump to new location immediately (instead of waiting for next VBL) ; Exit to DOS movea.l 4.l,a6 ; execbase lea DosName(pc),a1 ; "dos.library" jsr -96(a6) ; Exec _LVOFindResident tst.l d0 ; Resident module opened? beq.w Error ; no - branch movea.l d0,a0 ; A0 <- Pointer to DOS library Resident Module Tag structure (see exec/resident.i STRUCTURE RT) movea.l $16(a0),a0 ; $16 = RT_INIT from DOS library Resident Module Tag (STRUCTURE RT exec/resident.i) moveq #0,d0 ; boot OK code rts Error: moveq #$FFFFFFFF,d0 ; boot failure code rts ; --------------------------------------------------------------------------- ; DATA DosName: dc.b 'dos.library',0 pRastPort: dc.l $7EE00 ; n.b. rp_SIZEOF=$64=100 which will overlap pBitMap! pBitMap: dc.l $7EE50 ; bm_SIZEOF=$28 copperList: dc.w $2001,$FFFE ; WAIT near bottom of screen dc.w $100,$0200 ; BPLCON0,COLOR (Composite video COLOR enable) - no bitplanes dc.w $8E,$0581 ; DIWSTRT (normal PAL DIWSTRT is $2C81) dc.w $90,$40C1 ; DIWSTOP n.b. VSTOP $40 means $140 (normal PAL DIWSTOP is $2CC1) dc.w $92,$0038 ; DDFSTRT Normal low-res value dc.w $94,$00D0 ; DDFSTOP Normal low-res value dc.w $102,$0000 ; BPLCON1 no scroll dc.w $104,$0024 ; BPLCON2 Invalid PF2P value? Playfield 2 (even) priority over sprites dc.w $108,$0000 ; BPL1MOD zero (bitplane width == Playfield width) dc.w $10A,$0000 ; BPL2MOD zero "" dc.w $E0,$0007 ; BPL1PTH $70000 + ... dc.w $E2,$EF00 ; BPL1PTL ... $EF00 = $7EF00 dc.w $7F0F,$FFFE ; WAIT LINE $7F dc.w $180,$00F9 ; COLOR00 dc.w $182,$00F9 ; COLOR01 dc.w $8001,$FFFE ; WAIT LINE $80 dc.w $180,$0114 ; COLOR00 dc.w $8C0F,$FFFE ; WAIT LINE $8C dc.w $100,$1200 ; BPLCON0,BPU0|COLOR - use bitplane 0 dc.w $940F,$FFFE ; WAIT LINE $8C dc.w $100,$0200 ; BPLCON0,COLOR (Composite video COLOR enable) - no bitplanes dc.w $A00F,$FFFE ; WAIT LINE $A0 dc.w $180,$00F9 ; COLOR00 dc.w $A10F,$FFFE ; WAIT LINE $A1 dc.w $180,$0000 ; COLOR00 dc.w $FFFF,$FFFE ; END copperListEnd COPPER_LIST_LENGTH_BYTES EQU *-copperList COPPER_LIST_LENGTH_LONGS EQU COPPER_LIST_LENGTH_BYTES/4 GfxName: dc.b 'graphics.library',0 ; Not sure why this is here. Is this an 'even'? dc.b $FF text: dc.b "BOOTBLOCK Xcopy 6 !SKID R" END |
17 April 2022, 13:12 | #2 | ||||||
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Quote:
No. Quote:
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This is just cul coderz junkware. Ignore the mistakes, they didn't know better neither couldn't do better... There is more junk here. There is no reason to hack the copper (UCopList, CMove and CWait exist if you want copper effects in a system friendly way). |
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17 April 2022, 13:20 | #3 |
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Thanks. Looks like I didn't pick the best code in the world to study!
DOS Delay sounds good but thought the DOS library was unusable in the bootblock. |
18 April 2022, 08:56 | #4 |
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18 April 2022, 12:35 | #5 |
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It looks like graphics/WaitTOF() does not work as it stands once the custom copper list is in place.
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18 April 2022, 14:17 | #6 | ||
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Quote:
dc.w $104,$0024 This is a pretty standard value (default for OS): PF2P=100 and PF1P=100 Why do you think it is an invalid value? Have you maybe misinterpreted the hexadecimal value? Quote:
The correct functioning of WaitTOF is bounded to the IRQs system routines, it does not seem to me that it has anything to do with the modified Copper list (but I have to check if at boot in effect something is different..). Are you really sure you haven't made any mistakes in the code that uses it? Can you post it? |
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18 April 2022, 14:24 | #7 |
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18 April 2022, 14:43 | #8 |
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18 April 2022, 14:46 | #9 |
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18 April 2022, 19:08 | #10 |
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I've fixed up the bootblock to make it system-friendly and CPU-independent as well as I can.
It was all going OK until the very last step when I moved the copper list from the hardcoded address into a dynamically allocated Chip RAM buffer. The bootblock behaves correctly until it the end when it comes to call FreeMem on the Chip RAM allocation. Then the machine crashes. Stepping over this line with 'z' in the WinUAE debugger seems to cause the PC to fly off. Before the call it looks like A1 is pointing to the orignal allocation and D0 is the correct size. I can't figure out what is going on here. Attached modified source and bootblock binary. Thanks for any pointers on what could be going wrong. Code:
; Created by using X-Copy 6 Install command on real Amiga 1200 and ripped with ReadBootblock ; Fixed to make system-friendly and CPU-independent by me. include "exec/resident.i" ; RT_INIT include "exec/memory.i" ; MEMF_CHIP (via macro) include "graphics/gfxbase.i" ; gb_copinit include "graphics/rastport.i" ; rp_BitMap include "hardware/custom.i" include "lvo/exec_lib.i" include "lvo/graphics_lib.i" ; --------------------------------------------------------------------------- ; Constants ; n.b. Can't have any space between oprands e.g. A+B is fine, but A + B is not! BIT_PLANE_WIDTH_PIXELS EQU 320 BIT_PLANE_HEIGHT_PIXELS EQU 8 BIT_PLANE_WIDTH_BYTES EQU BIT_PLANE_WIDTH_PIXELS/8 BIT_PLANE_SIZE_BYTES EQU BIT_PLANE_WIDTH_BYTES*BIT_PLANE_HEIGHT_PIXELS TEXT_POS_X EQU 55 TEXT_POS_Y EQU 6 GFX_BUFFER_SIZE_BYTES EQU rp_SIZEOF+bm_SIZEOF CHIP_RAM_BUFFER_SIZE_BYTES EQU COPPER_LIST_SIZE_BYTES+BIT_PLANE_SIZE_BYTES ; --------------------------------------------------------------------------- ; BB Header dc.b 'DOS',0 ; BB_ID - Always has to be DOS\0 dc.l $54A6B95C ; BB_CHKSUM - Fix up with FixBootblockChecksum after assembling dc.l 880 ; BB_DOSBLOCK - Rootblock location for DOS disks ; --------------------------------------------------------------------------- ; BB_ENTRY ; n.b. Bootblock is called with A6 = ExecBase ; Allocate memory for RastPort and BitMap structs move.l #GFX_BUFFER_SIZE_BYTES,d0 ; byteSize moveq #0,d1 ; attributes jsr _LVOAllocMem(a6) ; D0 <- address of allocated memory block (or zero) lea.l pGfxBuffer(pc),a0 ; Calculate effective address of pGfxBuffer pointer with respect to PC for position independent code move.l d0,(a0) ; Store address of allocated memory beq Error ; store RastPort and BitMap struct pointers lea.l pRastPort(pc),a0 ; Calculate effective address of pRastPort pointer with respect to PC for position independent code move.l d0,(a0) ; Store address of allocated memory addi.l #rp_SIZEOF,d0 ; Calculate address of BitMap in buffer lea.l pBitMap(pc),a0 ; Calculate effective address of pBitMap pointer with respect to PC for position independent code move.l d0,(a0) ; Store address of allocated memory ; Allocate Chip RAM for Copper list + BitPlane clr.w $100 ; Tony Wilen's memory breakpoint. Use w 0 100 2 in debugger http://eab.abime.net/showpost.php?p=899516&postcount=6 move.l #CHIP_RAM_BUFFER_SIZE_BYTES,d0 ; byteSize move.l #MEMF_CHIP|MEMF_CLEAR,d1 ; attributes: Allocate in Chip RAM and zero jsr _LVOAllocMem(a6) ; D0 <- address of allocated memory block (or zero) lea.l pChipBuffer(pc),a0 ; Calculate effective address of pGfxBuffer pointer with respect to PC for position independent code move.l d0,(a0) ; Store address of allocated memory beq Error ; store Copper list and Bitplane Chip RAM buffer pointers lea.l pCopperList(pc),a0 move.l d0,(a0) addi.l #COPPER_LIST_SIZE_BYTES,d0 lea.l pBitPlane(pc),a0 move.l d0,(a0) ; Open graphics.library lea GfxName(pc),a1 ; "graphics.library" moveq #0,d0 ; any version jsr _LVOOpenLibrary(a6) ; Exec OpenLibrary(A1=libName, D0=version) -> D0 library pointer movea.l d0,a6 ; A6 <- GfxBase ; InitRastPort movea.l pRastPort(pc),a1 ; A1 <- pRastPort jsr _LVOInitRastPort(a6) ; InitRastPort(A1 = RastPort*) ; InitBitMap movea.l pBitMap(pc),a0 ; A0 <- pBitMap moveq #1,d0 ; depth = 1 bitplane (byte) move.l #BIT_PLANE_WIDTH_PIXELS,d1 ; D1 <- BitMap width moveq #BIT_PLANE_HEIGHT_PIXELS,d2 ; D2 <- BitMap height jsr _LVOInitBitMap(a6) ; graphics InitBitMap(A0=bm, D0=depth, D1=width, D2=height) -> void ; Set RastPort BitMap movea.l pRastPort(pc),a0 ; A0 <- pRastPort movea.l pBitMap(pc),a1 ; A1 <- pBitMap move.l a1,rp_BitMap(a0) ; pRastPort->rp_BitMap <- pBitMap (rp_BitMap is at offset 4) ; Set BitMap Planes movea.l pBitPlane(pc),a0 ; A0 <- pBitPlane move.l a0,bm_Planes(a1) ; pBitMap->bm_Planes <- pBitPlane (see gfx.i) ; Move() pen in preparation for drawing text movea.l pRastPort(pc),a1 ; A1 <- pRastPort moveq #TEXT_POS_X,d0 moveq #TEXT_POS_Y,d1 jsr _LVOMove(a6) ; Move(A1=rp, D0:16=x, D1:16=y) ; Text() movea.l pRastPort(pc),a1 lea text(pc),a0 moveq #TEXT_LENGTH,d0 ; string length jsr _LVOText(a6) ; Text(A1=rp, A0=string, D0-0:16=length) ; Poke Bitplane address into CopperList move.l pBitPlane(pc),d0 ; D0 <- BitMap* lea copBpl1ptl(pc),a0 move.w d0,(a0) ; write lower word of address swap d0 lea copBpl1pth(pc),a0 move.w d0,(a0) ; write upper word of address ; Copy Copper list from bootblock into Chip RAM clr.w $100 ; Tony Wilen's memory breakpoint. Use w 0 100 2 in debugger http://eab.abime.net/showpost.php?p=899516&postcount=6 lea copperList(pc),a0 ; A0 <- copperlist data src address (src) movea.l pCopperList(pc),a1 ; A1 <- copperlist Chip RAM address (dest) moveq #COPPER_LIST_SIZE_LONGS-1,d0 ; DBF loop counter copLoop: move.l (a0)+,(a1)+ dbf d0,copLoop lea ($DFF000).l,a0 ; A0 <- custom chip base $DFF000 movea.l pCopperList(pc),a1 ; A1 <- Copperlist address in Chip RAM move.l a1,cop1lc(a0) ; Set COP1LC ($DFF080) to point to new copperlist in Chip RAM ; Strobe COPJMP1 ($DFF088) to make copper jump to new location immediately (instead of waiting for next VBL) ; n.b. Do not use the CLR instruction on a hardware register which is triggered by Write access. The 68020 ; CLR instruction does a single Write access. The 68000 CLR instruction does a Read access first, ; then a Write access. This can cause a hardware register to be triggered twice. Use MOVE.x #0, <address> instead. ; http://amigadev.elowar.com/read/ADCD_2.1/Hardware_Manual_guide/node000C.html move.w #0,copjmp1(a0) move.w #$8300,dmacon(a0) ; DMACON ($DFF096) , DMAF_SETCLR | DMAF_MASTER | DMAF_RASTER (DMAF_RASTER means bitplane DMA) ; Short (system-friendly) delay to give user time to read message ; n.b. System Functions Do Not Preserve D0, D1, A0 and A1. So use D2 as loop counter and preserve A0 ($DFF000) move.l a0,-(sp) moveq #100,d2 ; D0 <- loop counter: 100 at 50Hz = 2 secs frames delayLoop: jsr _LVOWaitTOF(a6) dbf d2,delayLoop move.l (sp)+,a0 ; Restore old copperlist move.l gb_copinit(a6),cop1lc(a0) ; Set COP1LC ($DFF080) <- gb_copinit (GfxBase+$26) move.w #0,copjmp1(a0) ; Strobe COPJMP1 ($DFF088). See notes above on previous strobe ; clean-up movea.l 4.w,a6 ; A6 <- ExecBase ; Free BitPlane movea.l pBitPlane(pc),a1 ; A1 <- BitPlane* move.l #BIT_PLANE_SIZE_BYTES,d0 ; byteSize jsr _LVOFreeMem(a6) ; Free RastPort+BitMap memory movea.l pGfxBuffer(pc),a1 ; A1 <- GfxBuffer* move.l #GFX_BUFFER_SIZE_BYTES,d0 ; byteSize jsr _LVOFreeMem(a6) ; Free Chip RAM clr.w $100 ; Tony Wilen's memory breakpoint. Use w 0 100 2 in debugger http://eab.abime.net/showpost.php?p=899516&postcount=6 movea.l pChipBuffer(pc),a1 ; A1 <- buffer address move.l #CHIP_RAM_BUFFER_SIZE_BYTES,d0 ; byteSize jsr _LVOFreeMem(a6) ; TODO: Why does stepping through this line cause PC to jump? ; Exit to DOS lea DosName(pc),a1 ; "dos.library" jsr _LVOFindResident(a6) tst.l d0 ; Resident module opened? beq.w Error ; no - branch movea.l d0,a0 ; A0 <- Pointer to DOS library Resident Module Tag structure (see exec/resident.i STRUCTURE RT) movea.l RT_INIT(a0),a0 ; RT_INIT offset $16 from DOS library Resident Module Tag (STRUCTURE RT exec/resident.i) moveq #0,d0 ; boot OK code rts Error: moveq #$FFFFFFFF,d0 ; boot failure code rts ; --------------------------------------------------------------------------- ; DATA even pGfxBuffer: dc.l 0 ; address of allocated buffer to store the following... pRastPort: dc.l 0 ; address of RastPort struct pBitMap: dc.l 0 ; address of BitMap struct ; Chip RAM pointers pChipBuffer: dc.l 0 ; address of buffer in Chip RAM containing Copper + BitPlane pCopperList: dc.l 0 ; address of CopperList in Chip RAM pBitPlane: dc.l 0 ; address of BitPlane memory in Chip RAM ; Copper list in bootblock data. Needs to be copied into Chip RAM to use copperList: dc.w $2001,$FFFE ; WAIT near bottom of screen dc.w $100,$0200 ; BPLCON0,COLOR (Composite video COLOR enable) - no bitplanes dc.w $8E,$0581 ; DIWSTRT (normal PAL DIWSTRT is $2C81) dc.w $90,$40C1 ; DIWSTOP n.b. VSTOP $40 means $140 (normal PAL DIWSTOP is $2CC1) dc.w $92,$0038 ; DDFSTRT Normal low-res value dc.w $94,$00D0 ; DDFSTOP Normal low-res value dc.w $102,$0000 ; BPLCON1 no scroll dc.w $104,$0024 ; BPLCON2 PF2P=100 and PF1P=100 dc.w $108,$0000 ; BPL1MOD zero (bitplane width == Playfield width) dc.w $10A,$0000 ; BPL2MOD zero "" dc.w $E0 ; BPL1PTH copBpl1pth dc.w $0000 ; will be filled in by CPU dc.w $E2 ; BPL1PTL copBpl1ptl dc.w $0000 ; will be filled in by CPU dc.w $7F0F,$FFFE ; WAIT LINE $7F dc.w $180,$00F9 ; COLOR00 dc.w $182,$00F9 ; COLOR01 dc.w $8001,$FFFE ; WAIT LINE $80 dc.w $180,$0114 ; COLOR00 dc.w $8C0F,$FFFE ; WAIT LINE $8C dc.w $100,$1200 ; BPLCON0,BPU0|COLOR - use bitplane 0 dc.w $940F,$FFFE ; WAIT LINE $8C dc.w $100,$0200 ; BPLCON0,COLOR (Composite video COLOR enable) - no bitplanes dc.w $A00F,$FFFE ; WAIT LINE $A0 dc.w $180,$00F9 ; COLOR00 dc.w $A10F,$FFFE ; WAIT LINE $A1 dc.w $180,$0000 ; COLOR00 dc.w $FFFF,$FFFE ; END copperListEnd COPPER_LIST_SIZE_BYTES EQU *-copperList COPPER_LIST_SIZE_LONGS EQU COPPER_LIST_SIZE_BYTES/4 GfxName: dc.b 'graphics.library',0 DosName: dc.b 'dos.library',0 text: dc.b "BOOTBLOCK Xcopy 6 !SKID R" TEXT_LENGTH EQU *-text END |
18 April 2022, 19:23 | #11 |
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Doh. I was double freeing *part* of the Chip RAM allocation. Removed the "Free BitPlane" part and all is well now.
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18 April 2022, 20:00 | #12 |
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It looks like switching to a User Copper List is the last big change to make. I can do this in C using the macros, but it seems a bit more awkward in assembly. I can have a go, but is the hard-coded Copperlist switch a problem in this bootblock situation?
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