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Old 10 March 2018, 10:27   #1
DanScott
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Complicted Blitter Help Required :)

Hi All,

I am blitting some words (1024 words in 4 blits of 256) of data using D = A where the source data is in the format: 0x111111abcde00000

Source data is one word wide.

I am using the source A mask in the format: 0xabcdef1111100000 so that i can set the top 6 bits to any combination in the final data.

If you must know, i am actually creating bitplane pointer addresses for each scanline, by having my bitplanes within a 64k boundary, and just writing the low word of the bitplane pointer using the copper. This data is being blitted into the copper list.

what I would like to do in addition to this is also effectively do an "add" too, to 2 of the bits in the source...

So for example, bits "a" and "b" in the soure:

0x00 -> 0x01
0x01 -> 0x10
0x10 -> 0x11
0x11 -> 0x00

efectively, it will be a = a xor 1 , b = b xor a

but I can't figure out if i can do this (combining it with the A mask stuff) in one blit.

Feel free to ask any other questions if i have not explained it well enough
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Old 10 March 2018, 14:45   #2
Leffmann
 
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Do those two bits in the output need to step through values 0-3 in order, or can you shuffle the bitplane data around so any order is fine?

Enable channel B DMA and point it to channel A, use a B shift value of 1, set channel C data to %1100000000, and use minterm A^BC. This will make those two bits cycle through values 00 10 01 11, if that order works fine.

Last edited by Leffmann; 10 March 2018 at 15:53.
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Old 10 March 2018, 16:11   #3
DanScott
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The bitplane data is fixed, as it is generated from a vertical fill

I would have to blit the data into a different order, to facilitate blitting the pointers in one blit.

Perhaps the only solution will be to do 2 blits for the pointers

I have been rackiny my brain all day trying to come up with a solution that works for 1 blit with the current bitplane data setup
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Old 10 March 2018, 16:41   #4
Photon
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First thought was, will it beat a 68000? 256 words isn't a lot...

Especially since an add must be multiple operations to allow the carry to ripple. Two bits is a special case, but one and only one bit must change per frame for carry ripple replacement. If that can be, done the bitplanes can be mapped in shuffled order to accommodate.

But if you do many 256-word blit repeatedly and the single blits are similar it will beat the CPU.
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Old 10 March 2018, 17:23   #5
DanScott
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The current blitter implementation saved around 32 to 40 scanlines of CPU time compared to the CPU implementation.

The reason I need to find a way to swizzle these 2 bits with the blitter is to save a lot of memory

Otherwise, I can work around this, just with a huge chip-mem overhead
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Old 10 March 2018, 17:36   #6
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The only other solution I see is if the c-bit can be guaranteed to be 1 after some reordering of data in memory, then you can do it with a single blit in descending mode. What's it supposed to look like when it's done, or would telling us jeopardize the #1 spot in the next demo compo?
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Old 10 March 2018, 18:23   #7
DanScott
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Quote:
Originally Posted by Leffmann View Post
or would telling us jeopardize the #1 spot in the next demo compo?
3 weeks until Revision
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Old 12 March 2018, 14:20   #8
hooverphonique
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The checkerboard challenge is over already
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Old 12 March 2018, 23:06   #9
DanScott
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Originally Posted by hooverphonique View Post
The checkerboard challenge is over already
Ain't no checkerboard
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