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Old 09 June 2022, 14:54   #21
alexh
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Originally Posted by a4k-oerx View Post
Anybody with some insight how SX-1 and SX-32 do their IDE?
They have a CPLD which implements the Gayle registers and IDE I/O. The CD32 Kickstart ROM includes the Gayle scsi.device IDE driver.

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And are there CD32 motherboards without a socket for rom in U6A?
You're right. The Kickstart + Extended ROM seems to be socketed on all CD32 motherboards.
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Old 22 June 2022, 19:28   #22
a4k-oerx
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Any idea which chip would the CPLD for IDE on SX-1 and/or SX-32 board? Can its content be read somehow?
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Old 23 June 2022, 03:35   #23
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Any idea which chip would the CPLD for IDE on SX-1 and/or SX-32 board? Can its content be read somehow?
On the SX-1, it's got to be either the Lattice pLSI1016 or the Altera EPM7032. Both chips are socketed so they should be easy to read with an appropriate programmer.


The SX32 series uses a completely different design. There's a big MACH chip on the original version and the later versions have a MACH chip and a few other extra chips. Can't tell what they are from pictures online.
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Old 23 June 2022, 12:52   #24
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Any idea which chip would the CPLD for IDE on SX-1 and/or SX-32 board?
On the SX32 MK2 there is only one CPLD. A Mach 231.

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Can its content be read somehow?
Probably not. But why bother to read the contents when there is the open source TF328 which is an almost identical alternative to the SX32?

And at least 3 other *proven* open source Gayle IDE re-implementations.
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Old 23 June 2022, 16:19   #25
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As already explained I would like to know how CD32 Debug Board, SX-1, SX-32 provide ide support to CD32. Obvisously real details about this are unknown.

Now we seem to know:

- CD32 Debug Board requires a chip labeled "IDE" at U16B on CD32 Debug Board and Developer Kickstart 40.56/40.58 (with temp_ide 39.2 module) in U6A in CD32. Kickstart 40.60 does not work with CD32 Debug Board IDE. @CD32Freak, Brek Martin, @gulliver, @xArtx

- SX-1 different design from CD32 Debug Board, has a CPLD which implements the Gayle registers and IDE I/O. Kickstart 40.60 required with Gayle scsi.device IDE driver. CPLD either Lattice pLSI1016 or Altera EPM7032. Different opinions if CPLD is readable. @Matt_H, @alexh

- SX-32 again different design. CPLD is big Mach on older, Mach and few extra Chips on newer Rev. One is a Mach 231. Probably Kickstart 40.60 required with Gayle scsi.device IDE driver. @Matt_H, @alexh

I am not interested in third party solutions.
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Old 23 June 2022, 19:01   #26
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On the SX-1, it's got to be either the Lattice pLSI1016 or the Altera EPM7032. Both chips are socketed so they should be easy to read with an appropriate programmer.
Both chips have a protection fuse you can program into them so they cannot be read out. I'd be amazed if they are not set.

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The SX32 series uses a completely different design. There's a big MACH chip on the original version and the later versions have a MACH chip and a few other extra chips. Can't tell what they are from pictures online.
Both SX-32 MK1 and MK2 have the same Mach 231 CPLD chips.

Both have two original Commodore CIA chips. I'm not sure why they didn't incorporate the logic of these into the CPLD? Cost? Capacity? Perhaps they have unique timing that couldn't be replicated? Who knows

Both have an RTC chip. They look different but they are the same part in a different package. (OKI M6242B)

Both have a PAL chip. Unknown what they do. Different form factor on each. Perhaps changed FPU for MK2?

Both have RS-232 Driver/Receiver chips for UART aka serial port (ADM238LJR).

Quote:
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I am not interested in third party solutions.
If you want to know how it works... you can look at an open source re-creation of the Gayle registers and I/O. They have to be similar if not identical otherwise they wouldn't work.

Last edited by alexh; 23 June 2022 at 19:24.
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