Blitter D channel and fill questions.

[Jobbo]

I've been poking around at some demos as I try to put together my own blitter fill pass for some polygons.


Some of what I've seen has been surprising.


Firstly I've seen many cases for fills and lines where BLTCON0 is setup with A or C enabled but no D channel enabled, yet the blit seems to work as expected.


I would have assumed you need the D channel enabled for any kind of output to make it to ram. Am I missing something or is the blitter just not very fussy and assumes that D is enabled if some of the others channels are on.


The other thing I've seen is fill pass blits where both EFE and IFE are turned on. I think the result is just the same as EFE only. But does anyone know if I'm missing something here, is there some special behavior when both are turned on?


While I'm at it the HRM seems to detail a bit labeled DOFF in BLTCON1 but doesn't specify what it is or how to use it, anyone know about that?

[a/b]

DOFF is ECS/AGA. It disables output to channel D. This, I suppose, could be seen as D is always used, regardless of BLTCON0 bits, unless you use DOFF (for backward compatibility with OCS).
Never experimented too much with invalid/weird bit combos, so can't comment on the rest (I was always more concerned about getting it right/compatible).

[Toni Wilen]

http://eab.abime.net/showthread.php?t=104887 explains line mode special cases.

EFE and IFE both set equals EFE and there are no differences between EFE+IFE and EFE only.

DOFF means blitter works normally but when blitter does D write, outputs are not enabled (I have no idea what was the use case, perhaps it simply helps chip testing?)

[Jobbo]

Thanks. I was mostly concerned that I was missing something important or passing up some extra performance. But seems some demos are either sloppy or purposefully misleading.

[Thomas Richter]

Originally Posted by Toni Wilen

DOFF means blitter works normally but when blitter does D write, outputs are not enabled (I have no idea what was the use case, perhaps it simply helps chip testing?)

The use case is comparing data. Even if the output is disabled, the blitter sets the BZERO bit in DMACON if the result of all blit operations are zero. Thus, you can compare two patterns, or check for collisions without a drawing operation.

[Jobbo]

Originally Posted by Thomas Richter

The use case is comparing data. Even if the output is disabled, the blitter sets the BZERO bit in DMACON if the result of all blit operations are zero. Thus, you can compare two patterns, or check for collisions without a drawing operation.

I wonder why disabling D wasn't made so it would already achieve this.

[Toni Wilen]

Originally Posted by Thomas Richter

The use case is comparing data. Even if the output is disabled, the blitter sets the BZERO bit in DMACON if the result of all blit operations are zero. Thus, you can compare two patterns, or check for collisions without a drawing operation.

DOFF != BLTCON0 D bit! DOFF is in BLTCON1 and is ECS/AGA only which only disables blitter output. EDIT: D DMA cycle is still executed and whatever was buffered in previous cycle gets written to memory!