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Old 21 April 2021, 13:11   #1
meynaf
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small code contest

Hi, time for a little challenge.
Not for anything big, time is too often limited for many of us - even though i'd clearly could find a few cases.

It's about doing the work of an instruction that does not exist :
asr.l #25,myvar(a5)


No assembler will accept this, and for good reasons

Doing the same without an available temporary uses - with a classical approach - 6 instructions and 10 code words !
(push tmp, move from mem, moveq #25, shift, move to mem, pop tmp)
Else, still 2 tmp Dn, 4 instructions, and 6 code words.
Doh, that makes 68k look like a stupid risc cpu

Now wondering, if there is a way to do this kind of shift with less code.
Something generic, but special code for particular cases is also welcome (f.e. #31 instead of #25, lsl instead of asr, etc).

Intended use is for some macros that should be reusable everywhere they are needed.
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Old 21 April 2021, 14:55   #2
Don_Adan
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For asr.l #31 only one temp register is necessary.
move.l myvar(a5),D0
add.l D0,D0
subx.l D0,D0
move.l D0,myvar(a5)

or

move.w myvar(a5),myvar+2(a5)
sxx D0 (sorry i dont remember which one)
extb.l D0
move.l D0,myvar(a5)
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Old 21 April 2021, 14:57   #3
Thorham
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Code:
    move.b  myvar(a5),d0
    asr.b   #1,d0
    extb.l  d0
    move.l  d0,myvar(a5)
Edit: Don beat me too it.
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Old 21 April 2021, 15:03   #4
Don_Adan
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For some (most?) cases only one temp register is necessary

move.w myvar(a5),D0
ext.l D0
asr.l #x,D0
move.l d0,myvar(a5)
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Old 21 April 2021, 15:12   #5
mschulz
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Quote:
Originally Posted by meynaf View Post
It's about doing the work of an instruction that does not exist :
asr.l #25,myvar(a5)
I know they are slow but how about using bitfields for 68020+? BFEXTS would do the trick here. Hmm, I would need to check the table with cycles for BF...
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Old 21 April 2021, 15:14   #6
meynaf
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Quote:
Originally Posted by mschulz View Post
I know they are slow but how about using bitfields for 68020+? BFEXTS would do the trick here. Hmm, I would need to check the table with cycles for BF...
Yes ! There is indeed this possibility :
Code:
 bfexts myvar(a5){0:32-25},d0
 move.l d0,myvar(a5)
Works for lsr (-> bfextu) or asr, but useless for lsr,rol,ror for which similar tricks also have to be found.
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Old 21 April 2021, 15:41   #7
Don_Adan
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Seems you need one temp register and one bitfield instruction and one write instruction
or one temp register and combination of three other instructions

move.b/move.w and extb.l/ext.w and asr.l #x,D0

and one write instruction.
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