Terrible Fire Accelerators

[Black68]

Originally Posted by 8 Bit Dreams

EDIT 2
continue playing with TF530 on rev.6A.. noticed, that if i insert my A501 extension - it kills 2Mb memory onboard on TF530.. leaving this card plugged with jumper removed - gives 0kb of additional memory. Seems that there is Zorro 2 conflict wich is sad, was hoping, it will add 512kb to the 2Mb giving me 2,5Mb. Don't know is there any advantage of - but you can mod this additional memory to chipmem

what error message do You get? if it's autovector interrupt related - You can switch it off

I get random-ish "Illegal Instruction" errors while loading some WHDL games. Now Im using a A600 supply (3 amps) and the setup is much more stable. Boots every time but still get some of those errors. I need to investigate further.

I can confirm I have a A501 connected to the rev.6a board and it does not interfere with the TF530 RAM. I have jumpers JP2 and JP7A (on the amiga board) configured to get 1Mb chip + 2MB fast from the TF530

[alenppc]

Hi plasmab, I was wondering if you could recompile the TF530 jed for 50 Mhz. When flashed with 40/60 mhz, my card won't boot at 50 Mhz, although it will boot at 60, but it crashes soon after. I think 60 Mhz pushes the ram chips too hard.

[dalek]

Me too pretty please, I'm trying to get my board working at 50MHz

[plasmab]

Originally Posted by dalek

Me too pretty please, I'm trying to get my board working at 50MHz

Ok. i'll see what i can do after I have started posting the 50 TF328s that need shipped...

[plasmab]

Just when you thought it was going quiet...






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[8 Bit Dreams]

Hmm.. can't wait a stream about this beauty

[mattymuc]

Huuuu the TF534S sweetie is here!

[kgc210]

For the TF534S are you just using an IDE - SATA chip or are you using a native SATA controller to the Amiga bus?

[plasmab]

Originally Posted by kgc210

For the TF534S are you just using an IDE - SATA chip or are you using a native SATA controller to the Amiga bus?

IDE to SATA Bridge Chip. Otherwise the scsi.device wouldnt autoboot. Side benefit is that it effectively gives buffered IDE for free. Its not like there would be any advantage to using anything else anyways as you still need to talk with ATA commands to a port.. which is what the IDE chip does.

Lots of of other little nuggets in here..... including

4Mb of SRAM in Zorro III Space (as opposed to 2Mb of ZII ram) This means the Z2 space is free for other things.

Another go at factoring out the INT2 cable. Will see how that pans out.

A5 is wired up to the bus CPLD so this can work in an ST.

The RAM CPLD is 100 pin and I have wired up for burst mode. This gives us the option of either the XC9572XL-VQ100 or the XC95144XL-VQ100. So if you want to cheap out with no SPI then you can use the '72 chip. Or if you want more room to play on the bus you can use the '144. They're electrically compatible i believe.

So yeah. Its a TF530 but with those improvements.

[plasmab]

I just bit the bullet and bought a AmScope microscope with trinocular port. TF Videos may be getting an upgrade soon.

[kgc210]

Originally Posted by plasmab

IDE to SATA Bridge Chip. Otherwise the scsi.device wouldnt autoboot.

I wish I could design hardware or program, would love a proper DMA IDE controller on the Amiga. All I was interested in at Uni was networks.

[plasmab]

Originally Posted by kgc210

I wish I could design hardware or program, would love a proper DMA IDE controller on the Amiga. All I was interested in at Uni was networks.

The bridge chip can do UDMA modes but I didn't see much point in over complicating the design. Esp for the 500 with a 4mb ram upgrade. You run out of memory in .1 of a second. Maybe for a virtual memory setup


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[kgc210]

I'm thinking more for an A4000 card. Would be a nice replacement for SCSI if we can get DMA/UDMA working.

[kgc210]

I don't want to derail this thread too much, but...
Do you have any recommended reading for Digital design and VHDL etc?

I have a few 68k books to read such as "Microprocessor Systems Design: 68000 Family Hardware, Software and Interfacing 3rd Edition"

I would like to understand what and why your CPLD code is doing etc.

[plasmab]

Originally Posted by kgc210

I don't want to derail this thread too much, but...
Do you have any recommended reading for Digital design and VHDL etc?

I have a few 68k books to read such as "Microprocessor Systems Design: 68000 Family Hardware, Software and Interfacing 3rd Edition"

I would like to understand what and why your CPLD code is doing etc.

I cant really help much here. I did two degrees in Electronics & Semiconductor design before ditching that for a career in software and analytics.. i did a video on getting started with verilog way back.

The book i got the most from was

Advanced FPGA Design: Architecture, Implementation, and Optimization

Steve Kilts
ISBN: 978-0-470-12788-9

But its really not for beginners. I taught VHDL for 3 years at one point so I guess my knowledge came by trying to be one step ahead of the students.

[kim_jorgensen]

After installing a MC68882FN40A that I bought from a trustworthy source there is no problems running my TF530 rev. 3 at 42 MHz. So yes, beware of the cheap ones from China.

I did also upgrade my Kickstart to 3.1 to allow autoboot from IDE and that works great. Another nice bonus is that Kickstart 3.1 sets the priority of slow ram so that everything gets put into fast ram first. However, according to Sysinfo the scsi.device 40.5 that comes with 3.1 has a much lower read performance than the scsi.device 43.45 that I was using.

To get more RAM on the TF530 I was considering piggybacking another 2 MB. This would of course require some changes to the CPLD and some additional wires. So I tried to make some modifications to the RAM CPLD e.g. change the autoconfig and move some of the RAM to C00000h but the source on GitHub is simply too old.

BTW did anyone try some 3.3V RAM on the TF530?

[plasmab]

Originally Posted by kim_jorgensen

After installing a MC68882FN40A that I bought from a trustworthy source there is no problems running my TF530 rev. 3 at 42 MHz. So yes, beware of the cheap ones from China.

I did also upgrade my Kickstart to 3.1 to allow autoboot from IDE and that works great. Another nice bonus is that Kickstart 3.1 sets the priority of slow ram so that everything gets put into fast ram first. However, according to Sysinfo the scsi.device 40.5 that comes with 3.1 has a much lower read performance than the scsi.device 43.45 that I was using.

To get more RAM on the TF530 I was considering piggybacking another 2 MB. This would of course require some changes to the CPLD and some additional wires. So I tried to make some modifications to the RAM CPLD e.g. change the autoconfig and move some of the RAM to C00000h but the source on GitHub is simply too old.

BTW did anyone try some 3.3V RAM on the TF530?

I never did.. the cost is 12 quid a chip and thats a bit much to blow up for me...

You cant put the RAM at C00000 (at least i dont think..) you are stuck with ram between 0x200000 and 0x9FFFFF. If the ram is anywhere above that Kick 3.1 thinks you've got a PCMCIA card there and crashes.

EDIT: it also will not autoconfig Z2 after 0x800000... it tries to put it in Z3 space after that.. i tried lots of things with the Kipper board and my board and my conclusion was to make the TF534S ZIII.

[kim_jorgensen]

Originally Posted by plasmab

You cant put the RAM at C00000 (at least i dont think..) you are stuck with ram between 0x200000 and 0x9FFFFF. If the ram is anywhere above that Kick 3.1 thinks you've got a PCMCIA card there and crashes.

EDIT: it also will not autoconfig Z2 after 0x800000... it tries to put it in Z3 space after that.. i tried lots of things with the Kipper board and my board and my conclusion was to make the TF534S ZIII.

Thank you for the info.

It was my understanding that the Kickstart would auto detect the memory in the slow ram/trapdoor area C00000-DBFFFF and add it to the memory free list without using autoconfig. But I guess I need to look more into the verilog before being able to test this.

[plasmab]

Originally Posted by kim_jorgensen

Thank you for the info.

It was my understanding that the Kickstart would auto detect the memory in the slow ram/trapdoor area C00000-DBFFFF and add it to the memory free list without using autoconfig. But I guess I need to look more into the verilog before being able to test this.

You can try that by setting configured = 'b1 by default at reset time and changing the base address decode to decode on 3'b110...

https://pastebin.com/2ZDvkGUU

[plasmab]

Originally Posted by kim_jorgensen

Thank you for the info.

It was my understanding that the Kickstart would auto detect the memory in the slow ram/trapdoor area C00000-DBFFFF and add it to the memory free list without using autoconfig. But I guess I need to look more into the verilog before being able to test this.

You can't do this with my board. if you map it at 0xC00000 then it will map from 0xC00000 to 0xDFFFFF ... which will prevent access to the motherboard chipset.

EDIT: I realised this when i tried it.