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#141 |
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OK Leffman - thanks for the clarification and the extra information.
![]() I must say that I don't understand this all yet from my first reading but that's not unusual for me ( ![]() Maybe I could try doing my own dot ball... Hmmmm.... |
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#142 |
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Not exactly answer to your question but I have noticed many lots of bobs or big multiface glenz routines usually have "2 cycle pipeline".
First cycle (current frame) is used to calculate coordinates, result is copper list filled with blitter operations. Second cycle (next frame) does the blit sequence (copper list is executed) while CPU is already calculating next frame's copper list. This way all available chip cycles are used, either by CPU or blitter without wasting cycles for blitter waits or trying to keep blitter busy while CPU is executing relatively slow instructions like MUL (which isn't possible with blitter interrupts, also interrupt startup time is really slow..) Of course everything breaks if there is even one "cycle" that takes more than 1 frame.. |
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#143 |
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@Toni Wilen
Using the copper to program the blitter is cool. How does the copper wait for the blitter to finish its previous operation though? I know there's a skipcond operation in the copper instruction set but the last I knew it was buggy to the point that it would only skip over a move instruction. I've got an idea for a generalized 3d plotter algorithm based on Allegro Scene-Render but being able to render scenes with the copper handling the blitter operations would speed things up a little bit more, I suspect. |
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#144 | ||
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Quote:
As an example, you do a normal wait like this. $2807,$fffe and one that waits for the blitter to be finished as well like this: $2807,$7ffe if I rememeber correctly... I used this recently myself when I made an Alcatraz (or Kefrens...) bar routine that used the copper to write the blitter - see my avatar for what these bars look like... ![]() ANOTHER EDIT: Also forgot to say you need to set the copper danger bit that's in some register somewhere (I could check the HRM for you but hey... no.) to allow the copper to write the blitter. Quote:
Last edited by pmc; 25 January 2010 at 09:24. Reason: Added example blitter & copper wait instruction |
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#145 | |
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Quote:
Time for me to check the HRM again myself after all I suppose. |
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#146 | |
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Quote:
http://eab.abime.net/showpost.php?p=206242&postcount=1 |
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#147 | |
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Quote:
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#148 |
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#149 |
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@StingRay
I thought somebody on EAB had managed to make loops in their copper list using a similar technique. I haven't actually tried it yet though. |
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#150 |
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@ Samurai_Crow - what StingRay said - you don't need CDANG set to use a copper skip instruction, only to allow the copper to write blitter registers.
As to the rest about loops, err - eh? |
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#151 |
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http://en.wikipedia.org/wiki/Origina...chipset#Copper see skip instruction. Thanks for the tip on not needing the danger bit to write to the copper's program counter though.
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#152 |
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I think SC meant that (on ECS and above) to be able to access the COPLC and COPCON registers to create some sort of conditional program flow, you need to set CDANG bit.
EDIT: nevermind that I think you can write those registers at all times actually |
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#153 |
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@ SamuraiCrow - Gotta say, read the Wikipedia sentence about the skip instruction and re-read stuff I'd already read in both the HRM and another book about the Amiga internals I have earlier today and I'm still thinking:
err... eh? about all this "unnested conditions" stuff you posted... HRM contains an example copper list that uses skips - might be worth picking yourself up a copy - it expands a lot on that Wikipedia text. |
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#154 |
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If it's on the Developer CD v2.1 then I already have the Hardware Reference Manual. It says that the copper can write to its own program counter with a MOVE to COPJMP1. Since that's at register $088 it doesn't need to write to the danger bit to access it. (According to Amiga Intern, Abucus Books.)
--edit-- Regarding the conditionals: That would be the result of jamming a later address from the copper list into COPJMP1. To do a loop, you'd do a previously used address in the copper list. --edit2-- After digging a little deeper I've discovered why it is so rare to see loops and conditionals in copper lists. If the destination address is on the other side of a 64k boundary, 2 moves would be necessary to write to the copjmp1 register set, one to the high word and one to the low word. Since there would be no way to suppress the jump after the write to the high word the low word would need to be 2 bytes higher than the source address. If the copper list memory were known to be aligned such that there were no 64k boundaries, only the low word would need writing to and it would be much easier. Last edited by Samurai_Crow; 26 January 2010 at 01:47. |
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#155 | |||||
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Quote:
I never said it couldn't. Quote:
I never said it did. What I did say is that CDANG needs to be set if you want to use the copper to write to the blitter, which it does. Quote:
Quote:
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#156 | |
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#157 |
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I am not sure whats the topic anymore but I still hope it is about Amiga's Copper and not some that look like Copper..
Of course you can write both address registers first, writing (or reading but you can't really read with copper) COPJMPx forces the jump (copies address to copper's internal address register, which btw does one dummy MOVE like copper cycle before copper continues normally using new address) Copper registers are not inside "dangerous" register range either. |
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#158 | |
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@ Leffman - fair play to you if you managed to fathom SC's explanation - you know I have respect for your opinions and knowledge - but how does that explanation make sense?
The COPJMP regs are word sized not long word sized so how can they have a high or low word as per SC's explanation? Also they're just strobe regs to force the copper to read the lists at the addresses in regs COP1LCH / LCL or COP2LCH / LCL which obviously *do* have a high / low word pair - you don't write any addresses to the COPJMP regs directly as SC's explanation says. Bearing this in mind what does all this 64K alignment stuff actually mean? - it just sounds like rubbish. Listen, I'm not trying to stir trouble or confrontation with SamuraiCrow and especially not with you - I'd just appreciate worthwhile explanations from someone who's actually in some way proved they know what their talking about. I mean, one minute the guy's saying you need to set CDANG to use a skip instruction (which is plain wrong) and the next he's some kind of skip instruction loop expert even though he's already posted he's never coded that stuff himself... just doesn't add up to me and doesn't help anyone trying to actually learn any of this stuff. EDIT: Toni beat me to it and was far more concise than me in pointing out the "shortcomings" of SC's explanations... Quote:
![]() ![]() Last edited by pmc; 26 January 2010 at 15:12. Reason: Toni beat me to it... |
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#159 |
move.l #$c0ff33,throat
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#160 |
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I think you need to read between SC's lines a bit. He knows he's not talking to beginner programmers and doesn't need to be perfectly explicit. In fact doing so could be demeaning or insulting, a mistake I do myself sometimes. If someone says COPJMP1 register set it should be understood they're speaking about the COP1LC registers as well.
And about the 64K alignment stuff; since pointer registers consist of 2 registers of 16 bits each, you can decide on some 64K aligned location in memory and set the high order register accordingly and forget about it, and then just use the low order register alone to address within these 64K. |
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