30 October 2023, 15:45 | #1261 | |
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I think you are right, they where probably 68000 only with some form of MMU. (ill chalk this up to a brainfart on my part) Tangentially: Weren't the 68020 bitfield instructions added for Hewlett Packard for use in type setting and printing applications? |
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30 October 2023, 21:22 | #1262 | |
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Seem this is more tricky - found information that DN460 used real 68010. Am2900 implementation probably also emulated 68010 instruction list.
https://en.wikipedia.org/w/index.php...0-family_chips Source: Quote:
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31 October 2023, 04:28 | #1263 | ||
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With Pi GPIO, the Raspberry Pi Foundation made its fortune in the DYI and small business IoT and automation markets. Raspberry Pi's ARM CPU IP-based SoC is lifted from the very competitive mobile phone market. Raspberry Pi 4B and 5 Broadcom IGPUs are still rubbish for Android's Genshin Impact benchmark. Quote:
NEC V33 didn't include 286 and 386 MMUs which are used in the "world's best-selling" AT&T licensed Unix distro i.e. Microsoft-SCO Xenix. Windows 2.x 386 and Xenix 386 were the major issues that culled 16-bit X86 cloners. |
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31 October 2023, 05:18 | #1264 | |||||||||||
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Motorola wasn't serious about the Unix market when 68K MMU wasn't integrated until 68030's 1987 release. For Microsoft's Xenix, Intel integrated X86 MMUs for 286 and 386. Every 286/386 PC has Xenix potential. 80386-based PC laid the groundwork for Linux. Microsoft's Xenix was "the world's best-selling" AT&T-licensed Unix distribution before Microsoft was distracted by IBM's OS/2 project. https://techmonitor.ai/technology/mo...0_next_quarter Date: April 19, 1994. Motorola Inc yesterday finally launched the long-promised 68060 follow-on to the 68040, claiming that it matches the performance of the Intel Corp Pentium at less than half the price – it costs $263 at 50MHz when you order 10,000 or more and will sample next month. With 68060's 1994 release, Motorola Inc. made negative remarks against Intel Pentium competition. For Xmas Q4 1993 time period, Motorola's 68LC040 @ 25Mhz pricing allowed Apple to offer a competitive price vs performance solution against PC clone's 486SX-25/486-33 price range. Amiga's uncompetitive price vs performance cost issue is Commodore's fault. Your head is in the sand. Quote:
AMD's 80386 legal win against Intel is based on IBM's second X86 source contract enforcement. https://www.latimes.com/archives/la-...893-story.html An arbitrator last year agreed that Intel had violated the agreement AMD's credible second source insurance worked for X86's 64-bit transition when Intel attempted an anti-X86 Itanium 64-bit transition. NEC V30 lacks 80286's MMU compatibility, hence no "business" Xenix. NEC V33 is just a fast 8086 CPU type, hence NEC V30 series is just a toy 16-bit X86 CPU. Quote:
Commodore offered Pentium-based PC SKUs before its bankruptcy, hence Commodore is aware of Intel's Pentium performance roadmap. 68060 is dependent on 68040 CPU socket infrastructure and Commodore wasn't able to mass produce 68040 CPU socket infrastructure at the same level as Apple's 68LC040/68040-based systems. This topic is about Commodore NOT being bankrupt. Quote:
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Causal handheld gamers are on mobile phones. Quote:
RPi has many 3rd party add-on support and a large RPi community advantage over wannabe Pi clones. Quote:
You can't handle the truth e.g. Your "There was no war between 68k and x86" is bullshit. Quote:
HP fabricated Lisa chip with 1992 markings. Quote:
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https://ia904501.us.archive.org/28/i...sET4000VGA.pdf At 16 of 26 pages,ET4000 has drivers for AutoCAD 2.6. At the 17th page,ET4000 has drivers for AutoCAD R10/R11. At the 18th page, ET4000 has IBM 8514/A Emulation Driver. At the 22th page, ET4000 has Nth render drivers for 3D Studio and Auto Shade 2.0. Nth render is a protected mode display/rendering driver. It supports VGA, 8514/A, TIGA 2.0, and Nth Engine 150 adapters. At the 23th page, the ET4000 Windows 3.0/3.1 driver removes the need for application-specific drivers. Microsoft is the big elephant in the room. Quote:
Nintendo usually has several strong 1st party exclusive games and low entry costs, hence breaking legacy compatibility is not a major issue. December 1993, Doom doesn't have 320x480 resolution. Last edited by hammer; 01 November 2023 at 03:27. |
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01 November 2023, 19:41 | #1265 | |||||||||||||||
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And i agree - 286 was licensed by other companies as second source... And Windows no need MMU till 3.0 version - 286 provided simply possibility to address more memory not process/resources protection. Quote:
I don't care about Microsoft, Xenix etc - this is gibberish BS, completely irrelevant from this topic perspective, stop spamming thread with such garbage. Quote:
This shows that APPLE was important customer for Motorola and that APPLE competed with PC's - definitely there is no Commodore there. Quote:
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It can work with CPU and perhaps Copper (but consult this with Meynaf/Ross). And obviously you are wrong providing this as unique feature for "ECS/AGA Paula" - it will work with ICS Paula from Amiga (1000). Quote:
There was no war between 68k and x86 at least considering obvious 64k segmentation limit for x86 - you trying to create something artificial to justify your point Quote:
Being engineer not marketing guy i don't mix things contrary to you. Quote:
Check http://www.bitsavers.org/components/...oller_1990.pdf Where Tseng claim that this is 8514 capable chip - where is bitblit unit? Quote:
PGA offered "HW" accelerated functionality not present on CGA and "HW" functionality is implemented in general computing CPU such as 8088. So yeah, there can be 6845 (CGA) as CRTC and 8088 on top to perform some acceleration on PGA. Quote:
Do simple math Sherlock - DoubleScan is performed by VGA so physically you have 400/480 lines not 200/240 lines - it doesn't mean that they are software accessible (but you can create such video mode on VGA so there is nothing against to get Doom in 400/480 lines - in fact i don't understand why it was never possible in modernized Doom). Please focus on main topic, please don't quote irrelevant information - at least try... |
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02 November 2023, 05:56 | #1266 | |
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@Pandy71 - I honestly don't know whether should I be impressed or scared that you still have energy to discuss with that troll which uses OT when it suits him and bashes you every time you try to sneak a fun fact semi-related to the discussion. To this date he believes to some magic SIMD in Commodore PA-RISC despite the fact that every SFU related to pixels manipulation is SIMD there and it is already documented (and no, can't be used for general computing). And he still believes Hepler did PA-RISC implementation which works great WITHOUT big cache... so unlike EVERY HP PA-RISC (And yet Hepler in his next workplace never did anything quite like what he promised for Hombre).
Hammer is just someone without solid technical background which was fed with some scraps of information he couldn't understand and believed it to the point of blind fanaticism. You can't reason with him. Quote:
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02 November 2023, 19:32 | #1267 | |
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Doesn't count - CPLD/FPGA can be selected freely and you can replace AMD by Xilinx, Lattice or Altera - in opposite it will be difficult to replace Am85C60 by any other solution - you need significantly alter HW and of course design new software. |
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03 November 2023, 06:23 | #1268 | ||||||||
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NASA's use case will not sustain Commodore's core revenue revenue stream. Quote:
Fact: Commdore's Amiga is a desktop computer. Quote:
https://en.wikipedia.org/wiki/Xenix In the mid-to-late 1980s, Xenix was the most common Unix variant, measured according to the number of machines on which it was installed. Microsoft chairman Bill Gates said at Unix Expo in 1996 that, for a long time, Microsoft had the highest-volume AT&T Unix license. Intel's integrated MMU baseline for 32-bit 386 allowed memory-protected operating system development and large-scale deployment. Xenix is a niche relative to the very large MS-DOS installations just as 1992-1993 gaming PCs are a minority but still larger than the entire Amiga install base! Quote:
Windows 3.0 was released in 1990. The development work for Windows 3.0 started before 1990. Quote:
https://en.wikipedia.org/wiki/Xenix In the mid-to-late 1980s, Xenix was the most common Unix variant, measured according to the number of machines on which it was installed. Microsoft chairman Bill Gates said at Unix Expo in 1996 that, for a long time, Microsoft had the highest-volume AT&T Unix license. You can't handle the truth. https://en.wikipedia.org/wiki/Motorola_68010 For Unix 68k use cases before 68020, custom MMU was employed. Custom MMU wreaks mass deployment and makes Unix variants specific vendor-dependent. This caused 68K workstation market fragmentation. Quote:
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Again, https://techmonitor.ai/technology/mo...0_next_quarter Date: April 19, 1994. Motorola Inc yesterday finally launched the long-promised 68060 follow-on to the 68040, claiming that it matches the performance of the Intel Corp Pentium at less than half the price – it costs $263 at 50MHz when you order 10,000 or more and will sample next month. With 68060's 1994 release, Motorola Inc. made negative remarks against Intel Pentium competition. Commodore's Akiko C2P existence shows Commodore is aware of the PC's chunky pixel format advantage and it was too late. https://www.nytimes.com/1989/03/28/b...ith-intel.html Motorola Inc. today announced key features of its next-generation microprocessor, the 68040, opening a new round in its battle with the Intel Corporation, which is set to introduce its newest chip on April 10. Motorola said its 68040, the next generation in its 68000 family, would contain 1.2 million transistors and run much faster than its existing 68030. The new Intel 80486 is expected to be at least twice as fast as the 80386 used in high-end personal computers and is also expected to contain more than a million transistors. Motorola and Intel have been fierce rivals in the microprocessor business for years. Intel chips, the most powerful of which is the 80386, are used in personal computers made by the International Business Machines Corporation and manufacturers of compatible machines. Motorola's microprocessors are used in the Macintosh computer made by Apple Computer Inc. and in work stations made by Sun Microsystems Inc. and other vendors. While both companies seem to have well-established customer bases, they are still competing for the business of new companies that enter the personal computer business. https://techmonitor.ai/technology/mo...versial_claims MOTOROLA HEATS UP MIPS BATTLE WITH 50MHZ VERSION OF 68030, CONTROVERSIAL CLAIMS Motorola Inc, clearly making sure that Intel Corp has plenty to think about as it prepares to launch the 80486, and making it clear that despite the badmouthing it received early on, there is plenty more mileage yet in the 68030, this week, as reported briefly (CI No 1,151) came out with a version clocked at a blinding 50MHz – 17MHz faster than its previous fastest. The company claims that the speed means that the thing does 12 MIPS, double that of all conventional processors available today. The 50MHz 68030 is fabricated in 1 micron HCMOS, the first conventional processor to be produced below 1.2 microns – but NEC Corp will have something to say about boths claims: see below. The company reminds us that Apollo Computer, Apple Computer, Hewlett-Packard, NEC, NeXT, Sony Microsystems and Sun Microsystems all use the 68030. The part starts sampling next month at $650 a time, with volume production planned for the third quarter. Last edited by hammer; 03 November 2023 at 06:57. |
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03 November 2023, 06:25 | #1269 | |
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Hitachi's PA-RISC implementation has a reasonable-size cache and that's your mistake. Commodore selected the PA-RISC instruction set due to good code density among the RISC instruction set options and it's related to the CPU cache. Commodore's PA-RISC L1 cache implementation (ref 1) 1. The data cache has 1 KB with a 2 KB goal. 2. The instruction cache has 2 KB with a 4 KB goal. Hitachi PA/50 has 8 KB L1 instruction cache and 4 KB L1 data cache. PA/50's 1.2 transistors is close to Commodore's 1 million transistor budget. Hitachi HARP-1 has 8 KB L1 instruction cache and 16 KB L1 data cache. The HARP-1E supposedly included pseudo-vector processing modifications used in Hitachi vector supercomputers. PowerPC 602 (3DO M2) competition has a 4KB cache. https://www.cpushack.com/CIC/embed/a...owerPC602.html R3000 MIPS (Sony's PlayStation 1) competition has a 4KB instruction cache. 1KB data cache was repurposed for scratchpad. https://www.copetti.org/writings/consoles/playstation/ Commodore's core revenue stream is from game-centric Amiga SKUs, hence certain CPU instruction needs to be geared towards multimedia games. Commodore can't survive with just big box A2000/A3000/A4000 Video Toaster sales. 3DFX Voodoo is not "general computing" since its purpose is for certain triangle 3D-based workloads. Not every MMX instruction is used for integer 3D-related workloads. Your comments about me are bullshit. Reference 1. https://ia802805.us.archive.org/Book...ale=4&rotate=0 Last edited by hammer; 03 November 2023 at 07:28. |
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03 November 2023, 11:26 | #1270 | |||||||||
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True, Commodore never use this fact in their marketing - why - no clue but i can only guess. Yep, search for fresh dingo dung to hide your head... Embedded means huge money for Motorola, general computing is less money than embedded... Wow... you are true mastermind, thx for shedding light on this interesting topic. Quote:
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We NOT talking about Virtual 8086 mode in 386 which is NOT MMU What truth? Truth about? Quote:
FYI Motorola offered for MMU's:68451 and 68851. Some vendors implemented custom MMU's but this was vendor choice. Quote:
This is embedded market power. Quote:
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And it was rather quick workaround to address software developers requests - AGA could introduce native chunky but Commodore preferred to not, instead they introduced Akkiko on single platform... Quote:
Btw - CF clocked at 33MHz offered over 13.5MIPS - 68030 clocked at 50MHz only 12MIPS - that's why CF costing fraction of 68k price and offering higher computational power than plain 68k was good product for embedded market. Btw 68030 was never 486 competitor - 68040 was - and MMU was not necessary - same as FPU - that's why you have LC version. And competition doesn't mean [ Show youtube player ] . |
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03 November 2023, 11:55 | #1271 | |||
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Hitachi PA/50 is microcontroller. Those weren't really meant to be powerful. Graphics controller should be. PA/50 has 16MIPS @20MHz, it all shows how ridiculous amount of cache Commodore tried to put inside their implementation. You are the only one who fails to understand that. PowerPC ain't PA-RISC and neither is MIPS. Why are you trying to force the issue with examples of different architectures requiring different amount of cache to work well? It only shows how limited mentally are you. All fairly powerful PA-RISC had either very large L1 or relatively small L1 but gigantic L2. According to released documentation chip to be used inside Hombre had neither. Let it finally sink in... Quote:
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30 April 2024, 16:12 | #1272 | |
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http://archive.computerhistory.org/r...-05-01-acc.pdf Page 86 of 417, DataQuest 1995 1994 Worldwide Microprocessor Market Share Ranking. For 1994 Market Share 1. Intel, 73.2% 2. AMD, 8.6% 3. Motorola, 5.2% 4. IBM, 2.2% Page 84 of 417, Supply Base for 32-Bit Microprocessors—1994, For Product's Share of Total 32-Bit-and-Up MPU Market 1994 68000, 17% 80386SX/SL, 3% 80386DX, 3% 80486SX, 16% 80486DX, 21% 683XX, 9% 68040, 3% 68030, 1% 68020, 3% 80960, 4% AM29000, 1% 32X32, 3% R3000/R4000, 1% Sparc, 1% Pentium, 4% Others, 10% Motorola wasn't able to convert 68000's success for 68020, 68030 and 68040. 683XX has 68EC000 and CPU32 i.e. similar to the 68020 without bitfield instructions and with a few instructions unique to the CPU32 core. Motorola kitbashing 68K instruction set as product segmentation i.e. Jack Tramiel's Plus 4 (no hardware scroll and sprites) vs C64/ ST vs Mega ST (with custom blitter) mentality. 683XX has 25 to 33 Mhz clock speed. 683XX is a useless main CPU for the Amiga. You don't know shit. ---------------- 2. Other 68K based platforms do NOT run Amiga software, hence your argument is useless. The X86 camp is largely unified under the X86 PC clone market. The trinity AMD/Intel/MS governs the PC clones ecosystem and provides reference designs with IBM PC-compatible standards. These days, AMD/Intel provides "Designed for Windows" UEFI/ACPI PC reference designs i.e. go ask Framework Computer. Motorola's exit from the semiconductor market is real i.e. Motorola divested its semiconductor division as Freescale. Last edited by hammer; 30 April 2024 at 16:48. |
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30 April 2024, 19:04 | #1273 | |||
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But opposite to your claims Motorola 68k was very popular architecture in various embedded use cases - mostly industrial automation, military ,automotive, networking etc. There was many reasons for this but one of the most important factor was simply neat architecture - many programmers even today say that this is one of most pleasant ISA'a. So you are true when you wrote that Motorola didn't get market domination in general computing when compared to Intel x86 but it doesn't mean that Motorola doesn't have own market where 68k family was more popular than x86. Those markets provided Motorola more incomes than aggregated general computing. Quote:
g problem then you bravely arguing and fighting with this artificial problem... good for you - i can say only good luck... True, as i've wrote earlier - i have no clue (opposite to you) with dingo dung - good luck... Quote:
But this process was common for many big semiconductor brands. |
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01 May 2024, 01:12 | #1274 | |||
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Motorola tried to compete against Intel with price matching their 68030-25 against Intel's 386DX-25 and releasing 68040 against 80486. Motorola's 68030-25 didn't factor in AMD 386DX-40's price. Again, Motorola didn't convert 68000's success for 68020, 68030 and 68040. Quote:
http://archive.computerhistory.org/r...-05-01-acc.pdf Page 86 of 417, DataQuest 1995 1994 Worldwide Microprocessor Market Share Ranking. For 1994 Market Share 1. Intel, 73.2% 2. AMD, 8.6% 3. Motorola, 5.2% 4. IBM, 2.2% In 1994, Motorola's market share was already smaller than AMD's, let alone Intel's. Quote:
68020 and 68LC040 weren't 100 percent drop-in 68000 replacements due to the instruction set incompatibility. When Motorola didn't respect 100 percent 68000 backward compatibility, they couldn't convert 68000's success for 68020, 68030 and 68040. 2. Motorola tried to compete against Intel with price matching their 68030-25 against Intel's 386DX-25 https://archive.computerhistory.org/...-05-01-acc.pdf Page 119 of 981 For 1992 68000-12 = $5.5 68EC020-16 PQFP = $16.06, 68EC020-25 PQFP = $19.99, 68EC030-25 PQFP = $35.94 68030-25 CQFP = $108.75 68040-25 = $418.52 68EC040-25 = $112.50 --- Competition AM386-40 = $102.50 386DX-25 PQFP = $103.00 486SX-20 PQFP = $157.75 486DX-33 = $376.75 486DX2-50 = $502.75 For 68030-25, Motorola nearly price matched Intel's 386DX-25. Motorola didn't factor in AMD's 386-40 clone. "Always two, there are. No more. No less. A Master and an apprentice.". https://websrv.cecs.uci.edu/~papers/...LES/080502.pdf The 68000 line has had an intense rivalry with Intel’s x86 ever since IBM spurned Motorola for its first PC. Each processor generation has been lined up against its rival in performance. The 68040 delivers performance similar to the 486 running at the same clock speed. The weakness of the ’040 is that Motorola struggled to ship 33-MHz parts even as Intel was boosting the 486 to 50 Mhz and beyond Down The Garden Path Although Motorola has yet to begin shipments of the 50-MHz 68060, the company is already claiming that the chip will reach 66 MHz by the end of this year, just one quarter after 50-MHz shipments begin. Unfortunately, the company has a poor track record of meeting such claims, as shown by this brief history of the 68040. 4/89—68040 preannounced two weeks before Intel announces 486. Formal ’040 introduction set for 3Q89. 10/89—Company discloses ’040 architecture. 12/89—Motorola admits “No ’040 in ’89.” 1/90—’040 formally announced, general sampling slated for end of 1Q90. 4/90—Company claims ’040 on schedule for volume production midyear. Sample date slips. 9/90—Motorola announces it has begun general sampling of ’040 with volume shipments to begin in October. 11/90—Company claims 1,000 ’040s shipped this month and that volume production has begun. 1/91—HP begins shipping 25-MHz ’040 systems, promises 33 MHz in 2Q91. Benchmarks of new systems fall short of Motorola’s original claims. 6/91—Motorola says 33-MHz parts in September. 6/92—Volume shipments of 33-MHz parts begin. Motorola promises 40-MHz 68040 for September. 12/92—40-MHz parts begin to ship in volume. You're wrong with Motorola not competing against Intel. Your embedded market defense is a cop-out. Last edited by hammer; 01 May 2024 at 05:47. |
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01 May 2024, 05:01 | #1275 | ||
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1993 Hitachi PA/50L has 33 Mhz with 12 KB cache. Hitachi PA/50M has 60MHz with 12 KB cache. 1994 Hitachi HARP-1 has 150 Mhz with 24 KB and 1 MB L2 cache. Quote:
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01 May 2024, 05:03 | #1276 | ||
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1993 Hitachi PA/50L has 33 Mhz with 12 KB cache. Hitachi PA/50M has 60MHz with 12 KB cache. 1994 Hitachi HARP-1 has 150 Mhz with 24 KB and 1 MB L2 cache. Quote:
https://www.cpushack.com/CIC/embed/a...owerPC602.html Factor in the code density difference between PA-RISC vs PowerPC. Let that finally sink in... |
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01 May 2024, 05:32 | #1277 | |||||||||
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Data Quest 1995 market research made the situation clear on the 32-bit CPU market share for 1994. This includes the market share breakdown for each 68K model. Your argument is misinformation. Quote:
Motorola's 32-bit CPU market share was beaten by AMD in 1994. Quote:
VM86 uses MMU, idiot. "The Memory Management Unit (MMU) provides the support for both the segmentation of main memory for both protected mode and real mode" Quote:
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Data Quest 1995 market research made the situation clear on the 32-bit CPU market share for 1994. This includes the market share breakdown for each 68K model. Quote:
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Faster clones have these functions to be faster than IBM's EGA. Quote:
https://en.wikipedia.org/wiki/Advanc...ecture_chipset Direct Chunky 16-bit pixels 24-bit hybrid mode (with chunky/planar properties) consisted of 3 byte-planes of 8-bit chunks each. New packed (compressed) pixels (2-bit PACKLUT and 4-bit PACKHY) decompressed by Linda to 8-bit half-chunky or 24-bit Hybrid pixels respectively, used for speeding up animations. New Hold-and-Modify modes (HAM-8 chunky and HAM-10 for 24bit / 16.8 million colors). Sprites size can go up to 128 pixels in width at any height. Dual 8-bit playfields. 12× to 20× memory bandwidth of Chip RAM access of ECS. 8× Blitter speed increase of AGA/ECS blitter. 64-bit pixel bus with 114 MHz pixel clock in dual systems which makes 1280×1024 @ 72Hz screens possible. -------------- From 1989, only 1 year of serious R&D was committed to AAA. A lesson for not kicking out the original Amiga team. |
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01 May 2024, 13:13 | #1278 | ||||
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Guess how this is important for Amiga - ok, can't demand too much from you but at least try to guess (you can use coin as help). Yep but to simulate 86 in 386 - virtual 86 has no direct benefits from MMU itself moron. Quote:
obviously they use same HW to cover more functionality - right choice but 8086 has no benefits form MMU as it is not present in original 8086. Perhaps justified by usage case? Quote:
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Write mode register only help to alter planar data more efficiently but using it is affected by I/O latency. Famous Mode X was planar not chunky. AAA was crappy design - from Amiga future perspective it means high cost, practically no benefits i.e. dead end. |
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