18 April 2020, 22:11 | #101 | |
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Actually, if someone could dump the models from the 32x version? Obviously to have them as editable assets one would want them in a modern 3d software package. Or at least something like Milkshape 3d. Unfortunately, I don't really know much about what formats devs used back in the day for 3d amiga games. I always assumed everyone wrote their own importers. (Or if it was really low poly, they probably typed in the vertex coords by hand ;-) [Edit] So, is there anything resembling a standard 3d file format on the Amiga that game devs used? What would you do today? (I know Vlad wrote his own tool to read fbx format and convert to his own..) 3d construction kit ;-), wasn't that only supporting its own Freescape engine? Was there ever anything useful done with it? Gotta check youtube.. Last edited by eXeler0; 19 April 2020 at 01:02. |
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21 April 2020, 01:30 | #102 | |||
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Thanks for helping frame things in a better way than my attempts at explaining. =)
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680x0 didn't get a truly fast multiplier until the 68060, though you could probably muddle through a simplified version of VF's workload on a 40Mhz 68040 (14-20 cycles execution time). The SH-2 handles VF just fine and it takes the same number of cycles to multiply as the 68060. (Plus the 68060 is superscalar and can do a simple instruction for free at the same time without the bus contention the dual SH-2 setup that the Saturn has to deal with. A 50Mhz 68060 should be significantly faster overall than the 2X 28Mhz SH-2s in the Saturn) Quote:
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21 April 2020, 15:20 | #103 | |||
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Furthermore, during fight the fighters occupy only a quite small part of the frame. You could transfer only the union of the rectangular bounding boxes of both players. I'd probably use a sprite background (yes, repeats after 256 pix, but I guess that's ok), some copper gradient and 5 planes or so for the fighters. Then you could simply clear the (partial) frame with the blitter while the CPU works in fast mem. Maybe even draw and fill the floor (the 32x version is very simple) with the blitter in 2 extra planes. Quote:
Anyway, I don't want to claim it is possible, just some thoughts about its feasibility. |
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21 April 2020, 19:14 | #104 | |
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But then again, its a conversion... so.. |
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21 April 2020, 23:46 | #105 | |
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In this comparison table you can see by how much the Saturn outperforms a Pentium 133MHz for geometric calculations etc.. Ok its theoretical numbers which were probably never achieved on Saturn in any actual game, but still.. https://segaretro.org/Sega_Saturn/Ha...mparison_table |
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22 April 2020, 00:41 | #106 |
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Those numbers are very suspect though. The PS1 was, in reality, quite a bit better at "real world" 3D than the Saturn was.
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22 April 2020, 02:30 | #107 | |||||
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(Note: I am only slightly jesting.) Quote:
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Anyway, enough fantasizing about the Saturn, back to the Amiga. Quote:
I do not know if this would be the most efficient use of CPU though. Sure, the Blitter is slower at filling RAM than a 50MHz 030 but this is the worst possible use of that CPU: better use it to project vertices while the Blitter is busy being a Blitter. Quote:
Moreover, the PS1's CPU is alone to do projections and running the game code while the Saturn can dedicate one of its CPU solely to 3D projections. But anyway, let us not digress. So, has anyone written a v4 x M4x4 multiplication routine yet? How many of these can you run per frame? (Obviously, we are talking 16 bit fixed point maths, this is what the Saturn and PS1 used.) |
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22 April 2020, 12:10 | #108 | |
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22 April 2020, 13:37 | #109 | |
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Having only one axis of rotation + no perspective projection would give you also the possibility to pre-compute a ton of things like surface normals for lightning, backface culling etc. Anyway, I had only a look at some Youtube clips of VF and may be entirely wrong. Last edited by chb; 22 April 2020 at 13:42. |
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22 April 2020, 14:41 | #110 | |||||
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I'm honestly surprised that no accelerator manufacturers tried including a chipmem-writeback buffer. Obviously you wouldn't want it enabled for most writes but it would be cool to have a special-purpose buffer that you could write to and say "copy this to chipmem in the background and set an interrupt when you're done" for software that was aware of it. Quote:
For simple scenes you can build a copperlist to make a more complex queue but that's way into the weeds and is no good for what we're trying to do. In the end, given that the CPU has more bandwidth to the bitmap than the blitter does, doing a simple CPU alternating geometry + rasterization loop is 1000X simpler to code and not really any slower (and potentially faster). Quote:
The PS1 had the GTE though, a dedicated 3D transform engine, so the CPU could focus on game code. The GTE was easy to program for directly, and also had optimized libraries made for it early on if you didn't want to write your own engine. The Saturn only has a second CPU and a generic DSP, both of which are hard to program for (especially the DSP), and both of which were slower than the PS1's GTE at geometry. To get better 3D out of the Saturn you had to run transform threads in parallel on dissimilar processors, while figuring out a sane way to balance the workload between them, and very few games did this. The crappiest games didn't even try to use the second CPU, and all geometry was run with game code on the first CPU. It's sort of digressing but it does also help illustrate the problem on the Amiga. Using the Amiga's built-in chipset, we have to do everything in software using a single CPU into a slow framebuffer, or we have to use the CPU to manage an even slower blitter queue while trying to squeeze out spare cycles for other stuff while still servicing it. Virtua Fighter 32X is 100% software rendered (aside from the backgrounds and status bar overlays) but it has the benefit of having a much faster framebuffer to render to. Even then the result is just "good", any slower and it would be pretty poor. |
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24 April 2020, 08:19 | #111 | ||
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Although I suspect the Blitter could still be useful to do some menial tasks in the background while the CPU is busy with non-3D stuff. Quote:
In any case, this is just speculation (from me). What really needs to be estimated prioritarily is how many vertices can realistically be projected per frame. |
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24 April 2020, 16:14 | #112 |
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It's not really accurate to say that a CPU has more bandwidth to chipmemory than the Blitter. Best case bandwidth for both is identical (~7MB/sec), but many CPU's/turboboard don't manage to get that best case. Real world bandwidth of the CPU is therefore often somewhat lower than the Blitter.
The only reason it seems to be the case that the CPU has higher bandwidth is because it can use both fast and chip memory, while the Blitter is always using just chip memory. But this is a "trick of the mind": the CPU will still never exceed the ~7MB/sec to chip memory even if part of the operation is done using much faster fast memory. Not only that, but the CPU can't use all chip memory cycles while the Blitter can, which might make using the Blitter at the same time the CPU is working a good idea. Even a basic A1200 without fast memory can already do this to increase total bandwidth to chip memory. Last edited by roondar; 24 April 2020 at 16:34. |
24 April 2020, 16:48 | #113 | |
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An 3.5MB/sec on a A500/A1000/A2000 But the AGA-Blitter is still only 16bit wide ... so even it it gets all cycles and the CPU gets none there it has only 3.5MB/sec ... + some more if you use only very few colors (16 colors on Highres or >64 colors in low res) but still: on 32bit Amigas the Blitter has less chipram-bandwidth then the CPU |
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24 April 2020, 17:13 | #114 | ||
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Edit: DMA contention does play a role here, but even then the Blitter will generally not lose 50% of cycles on AGA* and given enough colours both CPU and Blitter are affected in a similar (though not identical) fashion. *) 320x256x8 bitplanes only takes roughly 1/7th of chip memory's total bandwidth on AGA. Last edited by roondar; 24 April 2020 at 17:21. |
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24 April 2020, 17:21 | #115 | ||
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But the CPU can still access half of the cycles with double the width... So: the Blitter has always LESS bandwidth! Quote:
Leaving three quarters to the Blitter (in nasty mode) still: 3/4 of 7MB/sec = 5.25MB/sec is less than the CPU Bandwidth of around 7 MB/sec in a A1200 Last edited by Gorf; 24 April 2020 at 17:31. |
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24 April 2020, 17:33 | #116 | |||
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Whether or not it has more/less cycles depends on a variety of factors. Assuming AGA, if you have a small number of bitplanes and a very efficient accelerator (most are not) then yes, the CPU will exceed the Blitter speed. But note this will be nowhere near the 2x speed you claimed before, more like 5-10% (dependent on number of bitplanes displayed). However, if you increase the number of bitplanes, the CPU advantage effectively dimishes to the point of vanishing as display DMA will start to steal cycles from it at a comparable rate as it does from the Blitter. Again, assuming AGA and a "perfect" accelerator: at 8 bitplanes, there is effectively no difference. At 7 bitplanes, the difference is only about 2%. At 6 bitplanes it's closer to 3,6%. At 5 bitplanes it's about 5,5%. Etc. Note that all this assumes the accelerator you're using hits every cycle to chip memory. Many don't. Even a 5% inefficiency here is enough to basically remove any advantage the CPU has. Quote:
Edit: here's some cycle math to show what I mean. The Amiga chipset (PAL) has 70512 DMA cycles per frame available to it. Of these, you lose 1152 to memory refresh. This leaves 69360 cycles. A 320x256x8 (4x fetch) display uses (320/64)*256*8=10240 DMA cycles. This is about 1/7th of the total. Neither CPU nor Blitter can access these cycles because the 8 bitplane fetch means all cycles in their respective slots are taken, leaving none for the Blitter or CPU to interleave. Quote:
Last edited by roondar; 24 April 2020 at 17:41. |
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24 April 2020, 17:40 | #117 | |
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So the Blitter has the same amount of cycles left the CPU would have. Only the Blitter is 16bit wide, while the CPU is 32bit wide. Therefore the CPU has double the bandwidth the Blitter has in this case. |
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24 April 2020, 17:44 | #118 | |
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Also, the Blitter only loses cycles while the bitplane data is being fetched, not across all cycles. That really does make a big difference. As does the fact that 8 bitplane fetches take all their cycles in their "blocks", so the CPU doesn't get better interleaving and effectively loses the same "chunk of performance" the Blitter does. Edit: I suggest we move any further talk on Blitter vs CPU cycles somewhere else, I feel it's getting a bit too far off the topic at hand. More than willing to continue talking about it if you want, though. Last edited by roondar; 24 April 2020 at 17:50. |
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24 April 2020, 17:50 | #119 | |
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Looking at the RKM that can't be: on OCS/ECS 4 bitplanes (16 colors) take exactly halve of the available cycles. On AGA we can can fetch 4x as much in one go ... but we want now double the bitplanes. 2/4=0.5 So we need 0.5 the DMA time we needed on ECS. On ECS we needed 50% of all cycles. So we need now 25% of all cycles (for LowRes@256) |
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24 April 2020, 17:57 | #120 | |
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