09 September 2022, 14:55 | #41 |
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09 September 2022, 15:08 | #42 | |
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09 September 2022, 18:13 | #43 | |
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Agnus is an 84 pin PLCC so the PCB will fit in any 84 pin PLCC socket (both surface mount and through hole) so the design could be used on any 84 pin PLCC chips. Obvious problem would be the sources available to make it work. It is pretty well down the list, but there is no reason that someone could not do the coding now that the design layout is available for Agnus. If people are willing to support it then it can be done I am just soldering up Faith (Denise) today so that will join the family Last edited by kipper2k; 09 September 2022 at 18:27. |
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09 September 2022, 20:14 | #44 |
Puttymoon inhabitant
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You sirs are heroes!
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09 September 2022, 20:17 | #45 |
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So it can be used in cd32 too?
Are all those improvments something like thicking almost "immediate blitter" in winuae? And one more question. Seriously. Will it work with Vampire if I use it just like an accelerator, no saga and stuff? |
09 September 2022, 21:11 | #46 |
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09 September 2022, 21:24 | #47 | |
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I may have to murder kipper2k for claiming Alice compatibility (as a chip) since the original intent was to be 8372 compatible and offer AGA features. But the on-chip pSRAM broke Amiga 3000 compatibility ANYWAY, so yeah, pie-in-the-sky here, I guess we're making a super-universal Agnus-Alice now. Expect availability in 2032.
Amiga 3000, 1200 and 4000 will only use on-board chip RAM. For Amiga 3000's that means popping out your slow DRAM and sticking in some 70ns FPM memory. I checked, they're plenty available. On these versions, the pSRAM may be omitted since there's no way to open > 2MB on them. Quote:
Even on real chip RAM on the 32-bit machines, opening up 2x and 4x fetch modes for all types of DMA changes everything. Even without "enhancing" anything, just relieving that kind of bottleneck is a big deal. That and having a blitter that's faster than the CPU again would be nice. Absolutely, why not? There's nothing here that would get in it's way. |
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10 September 2022, 03:14 | #48 | |
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11 September 2022, 15:14 | #49 | |
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OOpsie |
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11 September 2022, 17:49 | #50 |
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14 September 2022, 05:38 | #51 | |
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Alice's Blitter is still 16-bit like Agnus. |
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15 September 2022, 14:08 | #52 | |
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quickly exchange parts of the on-board ChipRAM. On the A3000 you could still feed Denise (or replacement) from the pSRAM since it is still only 16Bit. On all three you could feed Paula this way. Potential use-cases: double buffering were the active shown part is in the trans-2MB region, and a quick copy operation every frame from sub2MB to trans2MB... Or as a WHDload feature to quickly change between game and Workbench, by restoring the wanted ChipRAM contend between one frame... Or is this a stupid idea? |
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15 September 2022, 18:19 | #53 |
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15 September 2022, 18:44 | #54 | |||
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Not a dumb idea; you could still have that spare RAM in Agnus "high memory" and use the blitter to push it to-and-from chip. You could maybe even write directly to pSRAM from the CPU as long as you only write 16-bits to the write addresses. It would be clumsy and not compatible with anything else, but it could work. So from Agnus point of view we'd have Code:
$000000-$1FFFFF 2MB Base Chip RAM (in both 68K and chip space) $200000-$7FFFFF 6MB Extended Chip RAM (like UAE, only with new Gary) $800000-$FFFFFF 8MB Expansion Chip RAM (available via DMA only) ECS machines would have the 2MB Base Chip RAM and indirect access to the Expansion RAM. But like the 32-bit machines, Extended Chip RAM would need a modded Gary (much easier than a modded Fat Gary though). But all of custom chips can use the Expansion Chip RAM and we could extend the libraries to allow that. So like you said, WB could have its entire display in Expansion Chip RAM and not use one byte from the 2MB Base Chip RAM for games that can't see that. It would still need DMA, so it's not "free" like RTG would be, but it's close! This would also be trivial to add to UAE. Maybe we can ask Toni to mock up our "16MB Expanded Chip RAM Mode." |
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15 September 2022, 19:42 | #55 |
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I just realized that this also partially works with OCS (Amiga 1000). It would essentially work like this. And technically anything the CPU cant reach is Expansion RAM. It's not a perfect fix for the 1000, but it could be a big improvement from its stock 512KB. Does mean putting an pSRAM chip on Skinny Willoe thought...
Amiga 1000: Code:
$000000-$07FFFF 512KB Base Chip RAM (CPU+Chip) $080000-$FFFFFF 15.5MB Expansion Chip RAM (Chip Only) Code:
$000000-$0FFFFF 1MB Base Chip RAM (CPU+Chip) $100000-$FFFFFF 15MB Expansion Chip RAM (Chip Only) Code:
$000000-$1FFFFF 2MB Base Chip RAM (CPU+Chip) $100000-$FFFFFF 14MB Expansion Chip RAM (Chip Only) Code:
$000000-$1FFFFF 2MB Base Chip RAM (CPU+Chip) $200000-$7FFFFF 6MB Extended Chip RAM (Opt. CPU+Chip) $800000-$FFFFFF 8MB Expansion Chip RAM (Chip Only) Code:
$000000-$1FFFFF 2MB Base Chip RAM (Motherboard, CPU+Chip) $200000-$FFFFFF 14MB Expansion Chip RAM (Chip Only) Code:
xxxxPTH High 9-bits of address xxxxPTL Low 15-bits of address |
16 September 2022, 09:02 | #56 | |
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16 September 2022, 14:20 | #57 |
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So riddle me this; I thought the OCS/ECS chip memory was 16 bits wide at 280ns, so is AGA really slower than 140ns to need to use double-CAS? Shouldn't there be time to simply do two accesses in 280ns?
And to follow on from that: Shouldn't AGA be able to practically do quad-CAS in 280ns? |
16 September 2022, 15:41 | #58 | |
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Yes, with 70ns RAM, burst mode might have been available, but I'm pretty sure Gary lacks the signalling to the CPU to make that work. 70ns RAM might (just) fast enough to theoretically squeeze in two regular read operations (120ns) in the Agnus allocated interleave but that's pushing it. But may be possible. I think there's timing on top of that 120ns on the CPU side that might blow over the 140ns budget without a really fast 030. |
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16 September 2022, 15:58 | #59 | |
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However, take this answer with a grain of salt until someone who knows for sure verifies it (or debunks it) Edit: loving the all HW details in this thread by the way, helps me understand some things better |
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16 September 2022, 17:30 | #60 |
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@roondar - nope. AGA is 32b chipset EXCEPT blitter which is inside Alice and still 16bit wide (just like Alice memory interface). That's also a reason why with even slightly improved A1200 blitter itself was becoming obsolete as it was pretty hard to use it efficiently in conjunction with fast, fully 32b CPU. It was just easier to leave it out and save those DMA slots. As the blitter was a workhorse for OCS/ECS effects and amazing performance and was in decline in AGA it just meant good ideas by using "co-processors" in chipset were running out at that time.
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