14 June 2021, 21:33 | #41 | |||||
Registered User
Join Date: Jun 2010
Location: PL?
Posts: 2,810
|
Quote:
Quote:
Blitter may have capability (audio mode) to mix channels in RAM (multiplier and adder in blitter path). Quote:
Quote:
*Chipset limitations due limited technology and/or tight time budget. Quote:
Faster floppy - just add buffer and use default DMA to transfer data not RAW flux signal - this will already double transfer rates and made 500kbps possible. There is few unused register addresses in DFFxxx space - new features can be accessible trough indirect addressing (with only two 16 bit registers almost 128KiB register space - first shot - real RAMDAC with 24 bit color and for example 32/64K size - easily switchable by single Copper cycle). Real chunky mode just be changing how interpreted are normal biplanes (HAM-E embedded). There is plenty possibilities that will not affect any legacy timing - rather they modify way how data are processed. |
|||||
16 June 2021, 22:39 | #42 |
MI clan prevails
Join Date: Jul 2010
Location: Belgrade, Serbia
Posts: 1,443
|
On topic. It's kinda sensible to go for 1:1 implementation first. And start with the simplest of chips I guess. I don't know what that would be. Gary? CIAs?
|
17 June 2021, 09:49 | #43 | |
Registered User
Join Date: Jun 2010
Location: PL?
Posts: 2,810
|
Quote:
Gary is simple address decoder so nothing fancy and can be easily replaced even at some point by TTL logic (A1000 can be used as reference). CIA's are different and based on general issues with them (they are sensitive and at the same time exposed for external signals) it looks like very good candidate for replacement. |
|
26 June 2021, 20:17 | #44 |
Registered User
Join Date: Jan 2004
Location: Yorkshire
Posts: 710
|
It's only a quick mock-up but would it be realistic to do something like this? or would the smaller chips be a problem?
Are the 3.3V FPGA's absolutely not tolerant of 5V or would it just be a case of heat and lower lifespan? maybe find a solution with legs and stick a voltage regulator on the back? If someone wants to give this a try I'll volunteer my A600 board as guinea pig. Is there anyone actually able/willing to do the software side? I can try to design a drop in PCB if so. Last edited by Mick; 26 June 2021 at 20:56. |
27 June 2021, 09:59 | #45 | |
Registered User
Join Date: Sep 2006
Location: New Sandusky
Posts: 942
|
Quote:
CIAs would just need a microcontroller, like one of the smaller Arduinos. You could do it with custom silicon but it's probably not worth paying for the wafer rideshare for it, and an FPGA is overkill. If you absolutely wanted to avoid any firmware being involved you could maybe build a small board with part of the logic in a custom ASIC small enough to get on the cheapest/free rideshares like MOSIS, with a few parts like the timers in commodity components. The hard ones will be Agnus/Alice Denise/Lisa because they're so complex, and Paula because she's so poorly-understood. |
|
27 June 2021, 13:03 | #46 |
Registered User
Join Date: Jan 2004
Location: Yorkshire
Posts: 710
|
So start with something less complicated like the CIA's?
Can't we get the bulk of the code from Mike at FPGAArcade or something? he talks about his cores being made open source and moved to Github? https://www.fpgaarcade.com/replay2-a...-nano-support/ Plus he really knows his stuff and seems to be a perfectionist so his work should be really high quality. |
27 June 2021, 15:00 | #47 |
Mighty Pirate
Join Date: Dec 2017
Location: On the borderline
Age: 44
Posts: 177
|
jbilander did some research for a possible Agnus replacement in my thread here: http://eab.abime.net/showpost.php?p=...&postcount=148
That is more about how to physically make a drop-in replacement rather than the code that would run in it. |
27 June 2021, 15:32 | #48 |
Registered User
Join Date: Jun 2010
Location: PL?
Posts: 2,810
|
As an alternative to FPGA some more affordable ASIC approach like https://www.efabless.com/ can be investigated. ASIC are expensive but older technologies (130nm so 5V I/O compliant) is more than need when compared to overall Amiga chipset complexity.
btw Is there any explanation why Lisa in AGA is so much complicated when compared to ECS Denise (transistor count is approx 20 - 30 times bigger) - Lisa was outsourced to HP for their process to make possible 35ns clock but still this not explain so enormous grow of the complexity (i can imagine CLUT is one of primary sources for this - from 32x16 to 256x24(or 25? anyone knows if transparency can be set for CLUT entries same as on ECS?). but beside this and perhaps some buffers i don't see anything else... |
27 June 2021, 21:08 | #49 |
WinUAE developer
Join Date: Aug 2001
Location: Hämeenlinna/Finland
Age: 49
Posts: 26,534
|
256*25 (Genlock bit is settable and readable if RDRAM=1)
Other things I can think of that are much bigger in Lisa: - 2 more bitplanes. - Bitplane registers (I think it is 3 per plane) are 64-bit (was 16-bit) - Sprite registers (4 per sprite) are 64-bit (was 16-bit) - Palette registers probably are some kind of complex dual-ported design because they can be written to (or even read) by the CPU without visible glitches. - "real" shres support, all horizontal comparators use shres timing internally. Denise was mostly lores based except bitplanes supported hires. But this shouldn't increase complexity much. |
28 June 2021, 01:15 | #50 | |
Registered User
Join Date: Jun 2010
Location: PL?
Posts: 2,810
|
Quote:
Can't find now source but somebody listed that Lisa 391227-01 has over 225 thousand transistors - this mean it is most complex IC - it has more transistors than Agnus (Alice), + Paula + Denise + MC68000 - this is very odd to be honest unless HP process required something special then it is very difficult to justify such complexity. |
|
28 June 2021, 04:18 | #51 |
Registered User
Join Date: Sep 2006
Location: New Sandusky
Posts: 942
|
To be fair, Denise was laid out by hand and was ridiculously optimized. The ECS Denise changes were super tiny modifications, but the extra Lisa features were probably stuff they couldn't fit easily into the existing mask. Maybe they used some automated tool to make Lisa based on clean-sheet I/O requirements and the tool didn't optimize very well.
|
28 June 2021, 10:30 | #52 | |
Registered User
Join Date: Jun 2010
Location: PL?
Posts: 2,810
|
Quote:
This is something tricky... Lisa can be most challenging task (despite being quite simple at the functional level). Paula is tricky especially on the floppy part - particularly GCR as it is completely not covered by any official documentation... Agnus (Alice) can be tricky in terms of errors. CIA should be straight forward and almost easiest - in fact can be implemented easily in cheap ARM such as RP2040 (with functionality such as transparent integration of the USB 1.1 KB host within Amiga). |
|
29 June 2021, 13:12 | #53 |
Registered User
Join Date: Jul 2017
Location: Poland
Posts: 18
|
CIA seems to be in the works already, but of course open source solution would make more people happy.
https://1nt3r.net/j-cia/ |
29 June 2021, 22:33 | #54 | |
Registered User
Join Date: Jun 2010
Location: PL?
Posts: 2,810
|
Quote:
lol - sanded markings... hilarious... i bet same can be done with RP2040 (Programmable I/O and DMA made this inexpensive ARM almost ideal for Amiga IC replacement project) |
|
29 June 2021, 22:46 | #55 | |
Registered User
Join Date: Sep 2006
Location: New Sandusky
Posts: 942
|
Quote:
Lorraine was developed by hand, without the benefit of smart ASIC design software. This meant years of work but super tight design. By the time AGA came into being, they might have used automatic logic generation software -- which was relatively new and rather inefficient at the time. That would be something to ask some of the old Commodore engineers that are still with us. |
|
30 June 2021, 18:14 | #56 | ||
Registered User
Join Date: Jun 2010
Location: PL?
Posts: 2,810
|
Quote:
Quote:
It would be nice if someone from HP could say something on this... |
||
30 June 2021, 19:41 | #57 |
Registered User
Join Date: Feb 2018
Location: Nürnberg
Posts: 97
|
Maybe Dave Haynie would know more?
|
01 July 2021, 11:20 | #58 |
Registered User
Join Date: Apr 2017
Location: France
Posts: 609
|
Perhaps it contain AAA or Hombre parts which are deactivated or well hidden. Perhaps we have the one blitter per plan ability and we just don't know.
|
01 July 2021, 11:23 | #59 |
Registered User
Join Date: Jun 2010
Location: PL?
Posts: 2,810
|
Perhaps but don't get mi wrong - i have more faith in people like PurpleMelbourne. At some point replacement for Amiga IC's will be available and i can bet that this will be possible thanks to passionate people present on forum like EAB and/or similar to EAB.
|
14 August 2021, 14:55 | #60 | |
Banned
Join Date: Dec 2018
Location: Australia
Age: 51
Posts: 99
|
Quote:
I've been distracted from this while attending to my PicassoIV recreation which is now being assembled as prototype. For Agnus I'm now working with an Altera Quartus fan, so we'll be using an Altera chip. Late 1990's Altera Acex chips look suitable with 50,000 or 100,000 gates and 5volt GPIO pins, though 2.5volt internal voltage. The trouble is that you need an OLD version of Quartus to use these chips. The most recent version is Quartus 9.0 SP2 Quartus 9.1 has support for 5volt chips removed. Agnus from the MiniMig/Mister code seems a good place to start. Can anyone tell me how many Logic Elements it takes once compiled to silicon? Last edited by PurpleMelbourne; 17 August 2021 at 06:25. |
|
Currently Active Users Viewing This Thread: 1 (0 members and 1 guests) | |
Thread Tools | |
Similar Threads | ||||
Thread | Thread Starter | Forum | Replies | Last Post |
Reproduction PPC/060 Developer board? | jaesonk | support.Hardware | 12 | 01 September 2019 16:36 |
Amiga 500 European box size because of reproduction | StingerHU | request.Other | 63 | 21 March 2019 14:30 |
Amiga 500 European box reproduction | StingerHU | support.Hardware | 2 | 21 April 2017 01:09 |
Reproduction boxes for Amiga games? | ImmortalA1000 | Amiga scene | 7 | 02 October 2016 01:24 |
High Quality reproduction of Audio on 8 bit. | pandy71 | Amiga scene | 0 | 01 July 2013 15:08 |
|
|