FPGA based A500 accelerator

[VladR]

Originally Posted by Promilus

@Vlad - FPU isn't all that useful in amiga world. Only apps designed to run on 060-class machines use it often. FPU itself is almost as complex as CPU (when we're talking about 020-class). 060 - CPU is way more complex than FPU but FPU is way more complex than 020.

Fair enough - so even if there was an open-source FPGA implementation of FPU, it basically wouldn't fit onto this board.

I admit, I don't really know how much usage FPU gets in Amiga land (outside of 060 demos), but I am personally using it on Vampire - mainly due to the parallelism - while one Execution unit processes scanline traversal via Floating Point, the other one, in parallel, handles Integer related processes (like clipping, edge switching, etc.).

Each Execution unit has its own set of registers, so all the work basically gets done within registers. No RAM is being accessed within the scanline loop.

Of course, we would loose the parallelism here on this 68000, but the same code would still work and still bring the benefits of two register sets and no RAM access in the most performance critical stage of the 3D pipeline (scanline traversal).


Frankly, an ~85 MHz beast is asking to be abused like this

[NovaCoder]

Originally Posted by Promilus

@robinsonb5 - I think most ppl are missing the point. TG68 isn't the fastest available softcore running 68k ISA and doesn't pretend to be. It however can (with decent cache to utilize pretty fast SDRAM) outperform both 030@50MHz and even slower 040. And with that said - what is the problem with even faster CPU? It doesn't give anything spectacular to Amiga. Sure, CPU+Fast is pretty nice but you forgot chipset is seriously lagging behind and design from this thread doesn't aim to be vampire competitor at all. To utilize fast CPU you'll have to either support Z3 RTG (which is ok-ish up to 040 level) or softcore RTG on FPGA just like Vampire and Warp1260 does (and as a matter of fact VA2000 and ZZ9000 as well but as a dedicated product for Zorro slot). When it comes to suska - I am somehow confused how they chose OHL. Most softcores are treated rather as software (which makes sense because vhdl or verilog based softcore isn't directly hardware implementation, product of synthesis is). In the end there're plenty of ppl which doesn't really care if they got "fastest possible" classic amiga but rather want to have easy-of-use amiga which runs classic software smoothly and with no incompatibilities. Power hungry users already have either Warp1260 and 560 for those wanting real motorola cpu and Vampire V2 and V4SA for those who don't really care. No matter how fast softcore you'd use with A500/A2000/A600 or A1200 - it won't change the fact base of that machine is damn slow. What would be a gamechanger? E.g. Zynq with Wazp3D accelerated internally on ARM Cortex A9. What else? LiteSATA implementation. What else? Fast WiFi (not ESP32 bound by ~1mbit uart rate of STM32 with Warp or ENC28J60 SPI rate of Vampire). Good software to change speed and compatibility settings. Voltage and temperature monitoring. Things like that - to make things easier to use. For a speed demon I can run a WinUAE and no vampire can match that. MOS and AOS4 users can run with their UAE counterparts as well, more or less seamless (if program uses rtg and system libs). I'd rather see fast 030 speed and low price than 060 speed and high price. I'd rather see low cost enhancements.
@Vlad - FPU isn't all that useful in amiga world. Only apps designed to run on 060-class machines use it often. FPU itself is almost as complex as CPU (when we're talking about 020-class). 060 - CPU is way more complex than FPU but FPU is way more complex than 020.

I agree.

I'm now an FPGA user myself using a MiSTer and I've been thinking about what performance I'd really like for my Amiga. To be honest the MiSTer is already 90% there for what I want, it's the equivalent of a 30 MHz 030 in usage. The old 50mhz 030 is the well known sweet spot for most classic games.

I put an FPU as a nice to have, MMU I can live without.

More performance is always nice but just an 030 50mhz level FPGA board is pretty much perfect.

Hopefully the MiSTer will be getting RTG soon which will make workbench nicer to use

[ransom1122]

Originally Posted by NovaCoder

I agree.

I'm now an FPGA user myself using a MiSTer and I've been thinking about what performance I'd really like for my Amiga. To be honest the MiSTer is already 90% there for what I want, it's the equivalent of a 30 MHz 030 in usage. The old 50mhz 030 is the well known sweet spot for most classic games.

I put an FPU as a nice to have, MMU I can live without.

More performance is always nice but just an 030 50mhz level FPGA board is pretty much perfect.

Hopefully the MiSTer will be getting RTG soon which will make workbench nicer to use

[ Show youtube player ]

[NovaCoder]

Yeah that's what I'm talking about

[Promilus]

Fair enough - so even if there was an open-source FPGA implementation of FPU, it basically wouldn't fit onto this board

Well you should remember FPU on V2 is somehow limited to fit the chip (not exactly ieee754 compliant, yes?) but that aside it takes so much LE on Apollo to get decent FPU. And with no extended precision so only 64b (not 80b - which almost no one uses now) it still failed to fit 55k LE Cyclone III of V2 and had to be further trimmed to 52bit precision. I believe 68881-compliant wouldn't be as obese as AC68080's style (mix of 040, 060, 68881 but lacks sin, cos, tan etc. which is understandable) but performance isn't great so that'd be limiting factor anyway. Look guys, Apollo team did wonderful job to make 68k-compliant softcore which is pretty powerful and instructions run like they're supposed to. Also comes out with nice enhancements. But final product costs a lot and has long queue. There're plenty things "nice to have" but if you push those on 1 man working on it in free time it would take him years to accommodate you. When you sum up all ideas in this thread you're inevitably pressuring for a new vampire - look how long it took Gunnar to materialize his idea and how many ppl he had for help. And this project started as something just a tier higher than Vampire V1 from Igor which most ppl didn't really care about.

some OCS/ECS users would like have AGA capabilities. They aim for V2 now to do that. I would not. If I have OCS machine I'd like to use OCS. Why turn it to keyboard and floppy for turbo card holding all new chipset? In that case I can just make a MiSTer in a small box or perhaps RPi4 with Amibian... whatever. If you have original machine - be happy about what it can do. When you turn motherboard to act just as KB controller I believe you miss the whole point of having original hardware. Turbo cards for A500, A600, A1200 should just let you enjoy that original hardware more. So makes things easier. Not to disable parts of functionality in favor to those built on turbo. So... I'd like to see OCS backed up by fast CPU and plenty of RAM, fast mass storage and games which runs 320x200x32 colors or 64EHB using those dozens of MB of fast ram and plenty of MHz of CPU. I know it wouldn't look svga-style. It doesn't have to. But there're hardly any good titles which requires pretty CPU and runs on chipset. I'd like to change that.

It would be pretty convenient to have built in scandoubler with HDMI out to let PAL/NTSC OCS/ECS/AGA titles run on modern TV which often lacks even SCART now. But that said - bigger TV you have, worse experience with amiga games is guaranteed. To conquer that you'd need smart filters which would upscale resolution and smooth things out. And there are some... but use tflops of GPU power

[NovaCoder]

Yep I agree, turning your old Amiga into a computer keyboard is pointless.

An FPGA accelerator than can perform like a real 020/030 @ 50Mhz for a cheap price does make a lot of sense though.

It's only when you start adding lots of features that it all starts to get a bit silly.

[nikosidis]

I agree with you. What make Amiga special is the original chipsets. Paula, OCS, AGA.
What is nice is to have a system that boots fast and feel fast opening windows, running whd-load etc.

[ex68k]

Originally Posted by Promilus

I'd love to meet that someone ... there aren't great many ppl actively getting involved in such enterprise.

There are some people working on that, but they do it quietly, because of ...

Originally Posted by Promilus

There are more than enough of those compiling their wishlists.

... that ;-)

[ex68k]

Originally Posted by NovaCoder

An FPGA accelerator than can perform like a real 020/030 @ 50Mhz for a cheap price does make a lot of sense though.

The "sweet spot" seems to be the 68040 now.
FPU is reduced, and MMU is also simpler ...

[nikosidis]

Originally Posted by ex68k

The "sweet spot" seems to be the 68040 now.
FPU is reduced, and MMU is also simpler ...

I like to stay away from 040, 060 to be as compatible as possible with 68000.

[Toni Wilen]

Originally Posted by nikosidis

I like to stay away from 040, 060 to be as compatible as possible with 68000.

That is mostly irrelevant when talking about reimplementations.

Real 68040+ is less compatible mainly because of big copyback caches (breaks badly coded programs much easiler) and simply because it is much faster. FPAG reimplementation does not need to have identical cache or speed behavior (and almost certainly there are better ways). It is same with software emulation, emulated 68040+ is basically 68020 that looks like 68040 only from software point of view.

68851 MMU is extremely complex, 68030 MMU is very complex. 68040+ MMU is relatively simple.

[ex68k]

Originally Posted by Toni Wilen

68851 MMU is extremely complex, 68030 MMU is very complex. 68040+ MMU is relatively simple.

Exactly my point. You go nuts, implementing all the weird behaviour of the 68851/'30 MMU in an FPGA ...

[Promilus]

040 has 6 stage pipeline. Pipeline itself is challenging for TG68 so I assume it's not nearly as easy as 020 ISA with faster instruction execution TG provides. Igor went up to 100MHz with simple cache but MIPS didn't go all that well along with it. Phoenix core - which was severely cut down apollo core - beat crap out of it without breaking a sweat. It's unlikely to came up with an idea to enhance TG68 up to phoenix core level, most likely you'd have to start from scratch, look how different cores implement cache, prefetch, superscalar ... BTW - phoenix DID (barely) fit into 8k LE of Cyclone II Igor used for his V600 version 1 (but it didn't have anything else so no SD card, no IDE, no ethernet... nothing, just CPU+fast). Cyclone IV board Mike used for his experiments has 22k LE which is almost 3x, Cyclone IV is also way more advanced than Cyclone II. So there is a room for improvement, of course, there's a room of getting things faster as well. But I wouldn't hope to see numbers similar to the softcore of apollo-team who have been pursuing the topic for many years now. So if it is as cheap as 030-based accel but faster and with more features - well then... shut up and take my money.

So in the end - implementing FPGA which is recognizable as 040 isn't all that hard. Implementing it to mirror how faster it was against 030 - well, that's something different.

[ex68k]

Originally Posted by Promilus

So in the end - implementing FPGA which is recognizable as 040 isn't all that hard. Implementing it to mirror how faster it was against 030 - well, that's something different.

first you walk, than you run ;-)

[Promilus]

first you walk, than you run ;-)

First you crawl, then you walk... that's usually how it goes but sometimes you start just start walking without crawling phase. It's like learning how to fly before walking - that's natural for some birds. I'd say using FPGA capable of holding additional logic should open ample opportunities to tune things up. But my guess is - the best thing to propagate cheap FPGA accelerators is to come up with idea how to easily mass produce it - and that said using eval kits are the best way to do that. Terasic DE0 nano costs ~100$, QMTECH Cyclone IV board with twice as many LE as DE0 nano costs 45$. Well the choice seems obvious. 55k LE is iirc the same number Vampire V2 has with Cyclone III series. What's limiting factor? 32MB SDRAM in one die. I'm not sure you could easily replace it for more capacity but I assume 64MB (512mbit) is within reach.

[ex68k]

Originally Posted by Promilus

First you crawl, then you walk... that's usually how it goes but sometimes you start just start walking without crawling phase. It's like learning how to fly before walking - that's natural for some birds. I'd say using FPGA capable of holding additional logic should open ample opportunities to tune things up. But my guess is - the best thing to propagate cheap FPGA accelerators is to come up with idea how to easily mass produce it - and that said using eval kits are the best way to do that. Terasic DE0 nano costs ~100$, QMTECH Cyclone IV board with twice as many LE as DE0 nano costs 45$. Well the choice seems obvious. 55k LE is iirc the same number Vampire V2 has with Cyclone III series. What's limiting factor? 32MB SDRAM in one die. I'm not sure you could easily replace it for more capacity but I assume 64MB (512mbit) is within reach.

And here I'm disagreeing with you. If/when you start, get just one of the free Vivado or Quartus IDEs, or even some open source stuff, and start coding. It will take a while, until you have everything working anyway (not just the HDL, but also test benches and test environment) By that time, prices and FPGA changed anyway, so start looking at real hardware, when you're ready ...

[Promilus]

I'd say... challenge accepted

I'll just add that after most recent generation of "cheap" FPGAs I wouldn't count on rapid development in that area. FPGAs are following pretty close manufacturing process capabilities but only those pretty high end which costs thousands of dollars per chip.
All you have now for hobbyist is the same you had several years ago...
Cyclone V 28nm, Spartan 7 - 28nm. The only difference is now you really have pretty cheap evaluation boards while those 10 years back only pretty expensive boards with peripherals like ethernet, sd card, display etc.
Yes, there's Cyclone 10... but cheap LP is 60nm while more expensive GX is 20nm iirc. Xilinx Ultrascale version of Kintex is 16nm, I don't expect that kind of hobbyist products anytime soon and even when they come it changes nothing. Cyclone III is still available and recommended for new designs and that's a chip 13 years old (while cyclone V is 9 years old). Cyclone 10 is 3 years old... so you see, it took 2 years to get from III to IV and then from IV to V but suddenly 6 years to go from V to 10 and basically only GX is real improvement. And how expensive is GX with 55k LE? Well there is none. Lowest has 85k LE and costs (one chip!) ~90$. 2x of complete eval boards of Cyclone IV 55k.

[ex68k]

Originally Posted by Promilus

I'd say... challenge accepted

[... and a lot of data I deleted ...]

That's my point. Write the HDL code, and worry about the chips later. Worst case, You have than an Idea, what to do with all the on chip memory you will have than ;-)

[mkstr]

Hi All,

Sorry for few updates on the accelerator lately - I've been busy with other things, but the placement and layout of the production design has been progressing and here is a render:



There is still a bit of routing to finish off, but nothing major.

Given the form-factor the hope is that this will be applicable to all of the 16-bit Amigas including the CDTV, and also possibly the Atari ST and classic Mac with some tweaks.

The final board will have either 128MB or 256MB of DDR2 SDRAM (price difference to be determined). Micro SD slot is on there, and there is a high speed serial bus for potential add-ons.

Should be able to update with pricing soon.

Mike

[kipper2k]

Hehe, A thing of beauty, Awesome stuff!!

Originally Posted by mkstr

Hi All,

Sorry for few updates on the accelerator lately - I've been busy with other things, but the placement and layout of the production design has been progressing and here is a render:



There is still a bit of routing to finish off, but nothing major.

Given the form-factor the hope is that this will be applicable to all of the 16-bit Amigas including the CDTV, and also possibly the Atari ST and classic Mac with some tweaks.

The final board will have either 128MB or 256MB of DDR2 SDRAM (price difference to be determined). Micro SD slot is on there, and there is a high speed serial bus for potential add-ons.

Should be able to update with pricing soon.

Mike