12 June 2024, 10:23 | #21 | |
Inviyya Dude!
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Quote:
I think I can work with that macro workaround you provided above, my friend... Thanks for that... |
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24 June 2024, 01:17 | #22 |
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Code:
org 100h start: mov $9,%ah mov $hello,%dx int $0x21 ret hello: db "Hello World",13,10,'$' Code:
$ vasmx86_oldstyle -Fbin -m8086 hello.asm -o hello.com Code:
0000000000000000 b409 mov ah, 0x9 0000000000000002 66ba0901cd21 mov edx, 0x21cd0109 0000000000000008 c3 ret 0000000000000009 48 dec ax 000000000000000a 656c gs insb 000000000000000c 6c insb 000000000000000d 6f invalid 000000000000000e 20576f and [bx+0x6f], dl 0000000000000011 726c jb 0x7f 0000000000000013 640d0a24 or ax, 0x240a |
24 June 2024, 11:16 | #23 |
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in cpu.c:
Code:
//static enum codetype mode_flag = CODE_32BIT; /* 32 bit is default */ static enum codetype mode_flag = CODE_16BIT; |
24 June 2024, 11:37 | #24 |
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ok the directive code16 also works. guess it's down to why -m8086 doesn't limit the opcodes then.
but i'll let you figure that one out. |
24 June 2024, 18:21 | #25 | |
Natteravn
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Quote:
mode_flagshould be set to a sensible mode, according to the selected CPU. I wrote this backend 20 years ago and never really touched it again, so I don't remember why I chose not to do that. What do you think which default mode make sense for which CPU? Besides writing this backend my experience with x86 is close to zero. And you may also contact me by email, as this is possibly the wrong forum for discussing vasmx86. |
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24 June 2024, 19:05 | #26 |
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Just one final note on vasmx86 (that I haven't used before), and not to knock on phx's good work in general there, but it's probably not well tested for <386 targets. In particular it won't error out on non-short Jcc's, but will instead emit the 386+ disp16/32 variant (0F 8x) even for -m8086. Likely won't be a problem if you're trying to make existing code work, but if you're trying to make something new targeting actual 8086 you need to be aware of it.
(Happy to continue discussion elsewhere) |
24 June 2024, 22:31 | #27 |
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@phx
8086,186,286 - code16 386-686 - code32 amd64 - code64 https://en.wikipedia.org/wiki/X86 and why can't we discuss x86 here? aros is a thing :P |
25 June 2024, 01:03 | #28 | ||
Natteravn
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Quote:
Thanks! Fixed and committed. Will be included in the next daily source snapshot in a few hours. Quote:
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25 June 2024, 21:16 | #29 |
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For release 2.0 it would be great if the Makefiles could be updated so vasm can be built for/on Windows x64 with Visual Studio command line with no changes. Currently
Makefile.Win32has to be manually edited to build sucessfully. After downloading the latest snapshot, my process is: 1. Open Visual Studio 2022 x64 Native tools command prompt 2. CD to vasm dir 3. nmake /f Makefile.Win32 CPU=m68k SYNTAX=mot Code:
c:\Amiga\vasm\vasm.c : fatal error C1083: Cannot open compiler generated file: 'c:\Amiga\vasm\obj_win32\m68k_mot_vasm.o': No such file or directory Makefile.Win32to remove _win32from line 6 TARGET = 5. nmake /f Makefile.Win32 CPU=m68k SYNTAX=mot 6. Success I don't think separate .Win32and .Win64/ .x64Makefiles are required - the same makefile should be usable from any of the 4 combinations of {host32,host64}x{target32,target64} toolchain. Last edited by hop; 25 June 2024 at 21:18. Reason: Formatting |
25 June 2024, 22:32 | #30 | |
Natteravn
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Ok... you may be right. When using Visual Studio on Windows, then you are compiling for your native host platform, so the
TARGETextension can be removed and the existing objdirectory can be used, in the same manner as with the default Unix Makefile. Changed and committed for tomorrow's source snapshot. Quote:
.Win64nor .x64Makefile or target. And we have no plans to change that. |
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26 June 2024, 19:26 | #31 | |
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Quote:
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Yesterday, 03:43 | #32 |
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The attached example produces negative line numbers in the DWARF output.
Code:
vasmm68k_mot -m68000 -Felf -dwarf=3 -x -o test.o test.s objdump -W test.o [..] Line Number Statements: [0x00000028] Extended opcode 2: set Address to 0 [0x0000002f] Advance Line by -64 to -63 Ah, I think is the problem: Code:
3. DW_LNS_advance_line The DW_LNS_advance_line opcode takes a single signed LEB128 operand and adds that value to the line register of the state machine. Code:
add_data_atom(dinfo->lsec,1,1,DW_LNS_advance_line); add_leb128_atom(dinfo->lsec,line-dinfo->line); Last edited by arcanist; Yesterday at 03:57. |
Yesterday, 09:18 | #33 |
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Reduce assembling time as much as possible on native Amiga.
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