27 April 2024, 11:31 | #3841 | |
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To retaining legacy compatibility you simply integrate Agnus, Denise, Paula in single IC (perhaps with CIA's), instead producing separate video output you simple output video at digital domain so it can be digitally combined with RTG graphic (with relatively fast bus you can even think about fast blit of video buffer to RTG video buffer - as overlay for example). If you wish to made your "new" custom chipset faster and keep legacy compatibility (cycle compatible) then you provide new adaptive cycles interleaved with old ones in fixed pre-allocated slots. This was possible, especially when CBM started cooperation with other silicone vendors (like VLSI and HP). Main A1200 problem was it didn't tried to use already existing technology. Not sure about cost but i have impression that not integrating all chips into single one was primary source of failure - this is strange as CD32 seem to be step in right direction with Akiko - only Akiko should be integrated with Alice, Lisa and Paula, add to this CPU (can be non 68k in future Amiga) and ROM+RAM. |
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27 April 2024, 11:38 | #3842 |
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@TEG - not forbid access but rather not put cpu exclusive stuff and cpu code to chip ram.
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27 April 2024, 12:12 | #3843 | |
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The statement "PCs were even less suited for serious CAD" is not true. IBM PS/2 486s has ATI Mach8. Around late 1992 into 1993. |
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27 April 2024, 12:13 | #3844 | |
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According to Dataquest November 1989, VGA crossed more than 50 percent market share in 1989 i.e. 56%. Low-End PC Graphics Market Share by Standard Type Estimated Worldwide History and Forecast Total low-end PC graphic chipset shipment history and forecast 1987 = 9.2. million, VGA 16.4% market share. 1988 = 11.1 million, VGA 34.2%. 1989 = 13.7 million, VGA 54.6%. 1990 = 14.3 million, VGA 66.4%. 1991 = 15.8 million, VGA 76.6%. 1992 = 16.4 million, VGA 84.2%. 1993 = 18.3 million, VGA 92.4%. |
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27 April 2024, 13:00 | #3845 | |
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Fat Gary chip is in place of the Gayle chip. Super Buster and Ramsey chips are in place of the Budgie chip. 1991 "A1000Jr" does not have Budgie and Gayle. A1000Jr had a slow IDE interface. PCMCIA impacts both Budgie and Gayle. Once the AGA platforms are released, OCS/ECS Amigas will be dead-end platforms. For CD32, Akikio's integration step with several chips is important for cost reduction i.e. Gayle, Budgie, and two CIA chips. Budgie's and Gayle's R&D should been completed in 1990. PCMCIA does nothing for Amiga's core gaming use case. I preferred the effort for C65 R&D to be Akiko super I/O role Akiko's integration of several chips could allow for DSP3210. For your timeline, the IDE mandate needs to be dropped/delayed or completed by the end of 1990. Establishing a large enough AGA install base is a priority over the IDE mandate. Last edited by hammer; 27 April 2024 at 13:45. |
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27 April 2024, 13:04 | #3846 |
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They could keep OCS/ECS compatibility by emulation if they did Aga A LOT more powerfull..
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27 April 2024, 13:13 | #3847 |
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27 April 2024, 13:27 | #3848 | |
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Legacy OCS/ECS/Gary/CIAs could be in one IC and entirely new graphics AGA IP on Ramsey's with 020/030 32-bit 25 Mhz bus. Ramsey+new Graphics IP+CPU+Fast RAM is effectively the PiStorm side. Based on 3DO efforts, 25 Mhz ASIC seems to be the limit like Commodore's. Graphics IP is usually based on the memory controller foundation. AAA / SVGA wouldn't be enough for 3D. Don't follow the quadrilateral 3D acceleration direction. Sun GX was a bad influence. Last edited by hammer; 28 April 2024 at 01:27. |
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27 April 2024, 13:28 | #3849 |
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So you mean having Fast ram from the start? The OCS architecture was precisely about the possibility to separate cpu exclusive stuff from the video ram. But you know this so I've hard time to understand what your point is about.
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27 April 2024, 13:41 | #3850 | |
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What's important is delivering enough power for texture mapped 3D gaming experiences without difficult programming complexity. ----------- As for the modern GPU TFLOP scam, AMD's RDNA 3 CU's and NVIDIA's Ampere SM's double FPU units weren't scaled with texture units. AIDA64 shows large TFLOPS gains for Ampere, but PC games need textures. Extra TFLOPS are useful for DirectX12U's extra geometry load. For NVIDIA, Turing SM has 64 INT32 and 64 FP32. Ampere SM has 64 INT32/FP32 and 64 FP32. RTX 3070's TOPS (Trillions or Tera Operations per Second) is similar to RTX 2080 Ti's TOPS, hence similar results. The TFLOPS debate hides Turing's separate integer units. Last edited by hammer; 28 April 2024 at 01:39. |
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27 April 2024, 20:19 | #3851 |
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If you left OCS with the same Ram, But with Trap Door ram Without Bitplanes penalties, and HW Registers as well, you'll have :
7 mb from chip mem + 7 mb from trapdoor ram + 7 mb from HW registers bus + 7 mb from "fast mem" = 28mb peak rate, without expensive faster memory! Just better buses management |
27 April 2024, 23:49 | #3852 |
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Let's put a landmark here, because there is so many pages.
NO. |
28 April 2024, 01:20 | #3853 | |
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Lisa has 4X memory access improvements, but primary object manipulator wasn't scaled by 4X i.e. stuck in 1985 era. DSP3210 was the fast object manipulator for faster render intended bundle with AGA. Lew wasn't in the hotseat in the critical 1988 to 1991. Ali didn't factor in BillS's PCjr debacle. |
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28 April 2024, 04:09 | #3854 |
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28 April 2024, 04:19 | #3855 |
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#hammer
I was talking about ocs/ecs, and peak rate. |
28 April 2024, 04:47 | #3856 |
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28 April 2024, 05:04 | #3857 | |
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The problem is A1200+030@ 50Mhz's price rivals 486SX-25/486SX-33/486DX-25(e.g. Commodore PC DT486DX-25 LOL) prices. 68EC030-25 and 68EC020-25 had a low price advantage against 386DX-25. "Power without the price" could been configured for the Amiga 1200 when 68EC020-25 and 68EC030-25 with Commodore's economies of scale instead of small accelerator companies taking the risk. https://archive.computerhistory.org/...-05-01-acc.pdf Page 119 of 981 For 1992 68000-12 = $5.5 68EC020-16 PQFP = $16.06, it's $15 in 1993 Q1. 68EC020-25 PQFP = $19.99, it's $18 in 1993 Q1. 68EC030-25 PQFP = $35.94 68030-25 CQFP = $108.75 68040-25 = $418.52 68EC040-25 = $112.50 --- Competition AM386-40 = $102.50 386DX-25 PQFP = $103.00 486SX-20 PQFP = $157.75 486DX-33 = $376.75 486DX2-50 = $502.75 If Lew Eggebrecht's and Commodore engineers' AGA with the DSP3210 bundle was executed in 1991, A1200+ would have destroyed 386DX-40 and 486DX-33 competition. Lew Eggebrecht wasn't in Commodore's hot seat from 1988 to 1991. Ali fired Bill Sydnes after the A600 debacle and hired Lew Eggebrecht which is too late for the Amiga. If Ali hired Lew Eggebrecht instead of Bill Sydnes, the outcome would be different. Lew Eggebrecht managed to unify with Commodore engineers. Last edited by hammer; 28 April 2024 at 05:10. |
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28 April 2024, 05:09 | #3858 |
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28 April 2024, 14:48 | #3859 | |
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From the CPU point of view following components are on the same bus, therefore you cannot add these values together: Code:
7 mb from chip mem + 7 mb from trapdoor ram + 7 mb from HW registers bus In case of AGA: "chip mem": 7MB/s and 3,5MB/s for "HW registers bus" because they are 16bit. Even Lisa, which is the only 32bit chip in the A1200, has 16bit path to the CPU: https://jvaltane.kapsi.fi/amiga/howtocode/aga.html Code:
For example, to change colour zero to the colour $123456 lea (CUSTOM.L),a0 move.w #$0135,COLOR00(a0) move.w #$0200,BPLCON3(a0) move.w #$0246,COLOR00(a0) move.w #$0000,BPLCON3(a0) Last edited by Cyprian; 29 April 2024 at 10:46. |
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29 April 2024, 03:23 | #3860 | |
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Alice's shows 16-bit data pins i.e. DRD0 to DRD15. RGA has 8 pins. 32 bit Alice+ evolution wouldn't improve 2.5D/3D situation. https://www.amigawiki.org/doku.php?id=dearts:lisa Lisa shows 32-bit data pins i.e. D0 to D31. RGA has 8 pins. Budgie handles 32-bit memory controller duties i.e. 32 pins D and 32 pins DRD. Reference https://www.amigawiki.org/dnl/schematics/A1200_R1.pdf AGA has no problems displaying +50 fps 320x200 256 colors generated by a fast object manipulator e.g. [ Show youtube player ] Amiga 1200's AGA displaying Star Wars Dark Forces 68K with PiStorm32-Emu68 object manipulator. [ Show youtube player ] Amiga 1200's AGA displaying Beats Of Rage (OpenBOR 68K) with PiStorm32-Emu68 object manipulator. Last edited by hammer; 29 April 2024 at 03:50. |
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