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Old 27 April 2024, 11:31   #3841
pandy71
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Originally Posted by AestheticDebris View Post
Being more efficient at something which, with hindsight, turned out to be a poor design choice is not much of an accolade though. If the original architecture had more cleanly separated out video RAM and not required code to be executable there, the scope for increasing performance might have been greater. The PC did that (mostly by accident) and we can see that it worked better in the long run.

The more I read this thread, the more I think the flaw in the A1200 was trying to retain quite so much compatibility. The home computer market had thrived by just re-architecting each generation entirely (as the console market would continue to do). If Commodore had followed suit and just focused on a new "Amiga" design that wasn't compatible with OCS/ECS, maybe they'd have come up with a winner. Being stuck with the dying 680x0 line and working around design decisions made for OCS was probably a complication they didn't really need.
But you could retain legacy compatibility and provide "new" functionality - of course 24 bit address space was quite limiting but still you could manage to offer 1..1.5MB of continuous address range for RTG.

To retaining legacy compatibility you simply integrate Agnus, Denise, Paula in single IC (perhaps with CIA's), instead producing separate video output you simple output video at digital domain so it can be digitally combined with RTG graphic (with relatively fast bus you can even think about fast blit of video buffer to RTG video buffer - as overlay for example).
If you wish to made your "new" custom chipset faster and keep legacy compatibility (cycle compatible) then you provide new adaptive cycles interleaved with old ones in fixed pre-allocated slots.
This was possible, especially when CBM started cooperation with other silicone vendors (like VLSI and HP).

Main A1200 problem was it didn't tried to use already existing technology.
Not sure about cost but i have impression that not integrating all chips into single one was primary source of failure - this is strange as CD32 seem to be step in right direction with Akiko - only Akiko should be integrated with Alice, Lisa and Paula, add to this CPU (can be non 68k in future Amiga) and ROM+RAM.
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Old 27 April 2024, 11:38   #3842
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@TEG - not forbid access but rather not put cpu exclusive stuff and cpu code to chip ram.
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Old 27 April 2024, 12:12   #3843
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So?
PCs were even less suited for serious CAD.

Yes - Now we are talking.
But that does not explain the CAD-program mockup on the A3000 manual years earlier.
Sydney Waterboard has a fleet of IBM 486s with AutoCAD R12 and I used them as part of my work experience since my Dad worked in Sydney Water.

The statement "PCs were even less suited for serious CAD" is not true.

IBM PS/2 486s has ATI Mach8.

Around late 1992 into 1993.
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Old 27 April 2024, 12:13   #3844
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Yet for some reason that didn't stop AutoCAD from becoming "the most ubiquitous CAD program worldwide" by 1986, despite targeting a 4.77MHz 8088 with 640x200 2 color CGA graphics.

The secret sauce that ensured it's success? Being the first CAD program of note to run on the PC. It really was that simple. You had a PC, you needed a CAD program - and there it was.

To see how bad it was, watch this video...

[ Show youtube player ]

...and PC users lapped it up. By 1985 when the AMiga arrived the PC had EGA with 640x350 in 16 colors non-interlace, but that's not what made the difference. AutoCAD had such a reputation on the PC that nobody was interested in anything on the Amiga.
http://bitsavers.trailing-edge.com/c...lysis_1989.pdf

According to Dataquest November 1989, VGA crossed more than 50 percent market share in 1989 i.e. 56%.

Low-End PC Graphics Market Share by Standard Type
Estimated Worldwide History and Forecast

Total low-end PC graphic chipset shipment history and forecast
1987 = 9.2. million, VGA 16.4% market share.
1988 = 11.1 million, VGA 34.2%.
1989 = 13.7 million, VGA 54.6%.
1990 = 14.3 million, VGA 66.4%.
1991 = 15.8 million, VGA 76.6%.
1992 = 16.4 million, VGA 84.2%.
1993 = 18.3 million, VGA 92.4%.
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Old 27 April 2024, 13:00   #3845
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No, that would have been a disaster. The market was ready for AGA and expecting it. More OCS/ECS was what nearly sunk Commodore when they released the underwhelming A500+ and A600.

The A570 was supposed to turn an A500 into a CDTV. But CDTV wasn't compatible with KS2 which the A500+ had. So yeah, that was a cock up. The A570 should have come out at the same time as the CDTV. This would have boosted CD sales and given the CDTV a base to work from. The CD32 could then be released at the same time as the A1200, with the A600 replacing the A500 later (if they could make it cheap enough).

The timeline would have been:-

1990 - CDTV (as was promised!) along with A570 so A500 users could run the same titles. Commodore achieves 'multimedia standard' before PCs do!

1991 - A1200, A4000 and CD32. Continue selling the A500/A500+ while there was still demand. AGA becomes the next base level.

1992 - A600 as cheap alternative to a games console for A500 games (now on budget labels).

1993 - Commodore PlayStation

This is all true.
Without the IDE/PCMCIA mandate, A1200 and AA3000+ could be released in Q4 1991.

Fat Gary chip is in place of the Gayle chip.

Super Buster and Ramsey chips are in place of the Budgie chip.

1991 "A1000Jr" does not have Budgie and Gayle. A1000Jr had a slow IDE interface.

PCMCIA impacts both Budgie and Gayle.

Once the AGA platforms are released, OCS/ECS Amigas will be dead-end platforms.

For CD32, Akikio's integration step with several chips is important for cost reduction i.e. Gayle, Budgie, and two CIA chips.

Budgie's and Gayle's R&D should been completed in 1990.

PCMCIA does nothing for Amiga's core gaming use case.

I preferred the effort for C65 R&D to be Akiko super I/O role

Akiko's integration of several chips could allow for DSP3210.

For your timeline, the IDE mandate needs to be dropped/delayed or completed by the end of 1990. Establishing a large enough AGA install base is a priority over the IDE mandate.

Last edited by hammer; 27 April 2024 at 13:45.
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Old 27 April 2024, 13:04   #3846
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They could keep OCS/ECS compatibility by emulation if they did Aga A LOT more powerfull..
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Old 27 April 2024, 13:13   #3847
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Look at the modern GPU TFLOP scam...
So, how many FLOPS do you really need for current and recent 3D graphics then?
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Old 27 April 2024, 13:27   #3848
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Originally Posted by sandruzzo View Post
They could keep OCS/ECS compatibility by emulation if they did Aga A LOT more powerfull..
Sony's "fat" PS3 has "PS2 on a chip".

Legacy OCS/ECS/Gary/CIAs could be in one IC and entirely new graphics AGA IP on Ramsey's with 020/030 32-bit 25 Mhz bus.

Ramsey+new Graphics IP+CPU+Fast RAM is effectively the PiStorm side.

Based on 3DO efforts, 25 Mhz ASIC seems to be the limit like Commodore's.

Graphics IP is usually based on the memory controller foundation.

AAA / SVGA wouldn't be enough for 3D.

Don't follow the quadrilateral 3D acceleration direction. Sun GX was a bad influence.

Last edited by hammer; 28 April 2024 at 01:27.
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Old 27 April 2024, 13:28   #3849
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Originally Posted by Promilus View Post
@TEG - not forbid access but rather not put cpu exclusive stuff and cpu code to chip ram.
So you mean having Fast ram from the start? The OCS architecture was precisely about the possibility to separate cpu exclusive stuff from the video ram. But you know this so I've hard time to understand what your point is about.
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Old 27 April 2024, 13:41   #3850
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Mips don't mean more performance, if you can't use them. Power is nothing without control. Look at the modern GPU TFLOP scam...
PS1 is a powerful integer beast. PS1 has no Z-buffer 3D acceleration.

What's important is delivering enough power for texture mapped 3D gaming experiences without difficult programming complexity.

-----------
As for the modern GPU TFLOP scam, AMD's RDNA 3 CU's and NVIDIA's Ampere SM's double FPU units weren't scaled with texture units.

AIDA64 shows large TFLOPS gains for Ampere, but PC games need textures.

Extra TFLOPS are useful for DirectX12U's extra geometry load.

For NVIDIA,
Turing SM has 64 INT32 and 64 FP32.
Ampere SM has 64 INT32/FP32 and 64 FP32.

RTX 3070's TOPS (Trillions or Tera Operations per Second) is similar to RTX 2080 Ti's TOPS, hence similar results.

The TFLOPS debate hides Turing's separate integer units.

Last edited by hammer; 28 April 2024 at 01:39.
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Old 27 April 2024, 20:19   #3851
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If you left OCS with the same Ram, But with Trap Door ram Without Bitplanes penalties, and HW Registers as well, you'll have :

7 mb from chip mem
+ 7 mb from trapdoor ram
+ 7 mb from HW registers bus
+ 7 mb from "fast mem"

= 28mb peak rate, without expensive faster memory! Just better buses management
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Old 27 April 2024, 23:49   #3852
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Let's put a landmark here, because there is so many pages.

NO.
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Old 28 April 2024, 01:20   #3853
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Originally Posted by sandruzzo View Post
If you left OCS with the same Ram, But with Trap Door ram Without Bitplanes penalties, and HW Registers as well, you'll have :

7 mb from chip mem
+ 7 mb from trapdoor ram
+ 7 mb from HW registers bus
+ 7 mb from "fast mem"

= 28mb peak rate, without expensive faster memory! Just better buses management
68000 clock cycles memory access has direct influence over Agnus. Alice has two cycles improvements over Agnus four clock cycles.

Lisa has 4X memory access improvements, but primary object manipulator wasn't scaled by 4X i.e. stuck in 1985 era.

DSP3210 was the fast object manipulator for faster render intended bundle with AGA. Lew wasn't in the hotseat in the critical 1988 to 1991.

Ali didn't factor in BillS's PCjr debacle.
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Old 28 April 2024, 04:09   #3854
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Originally Posted by sokolovic View Post
Let's put a landmark here, because there is so many pages.

NO.

Or in other words, YES.
This thread has convinced me the A1200 was so much worse than my already low opinion of it when it started 7 years ago.
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Old 28 April 2024, 04:19   #3855
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#hammer

I was talking about ocs/ecs, and peak rate.
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Old 28 April 2024, 04:47   #3856
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Originally Posted by sandruzzo View Post
#hammer

I was talking about ocs/ecs, and peak rate.
OCS/ECS Agnus is designed around the 68000's memory access behaviors.

Fixing the sustain rate is better for general use cases.
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Old 28 April 2024, 05:04   #3857
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Or in other words, YES.
This thread has convinced me the A1200 was so much worse than my already low opinion of it when it started 7 years ago.
A1200 with 68030/68EC030 @ 50 Mhz is similar to the fast 386DX-40 with ET4000AX at VGA's 320x200256 color gaming. AGA is fast enough for 320x200 256 colors >50 fps Star Wars Dark Forces with a fast CPU solution.

The problem is A1200+030@ 50Mhz's price rivals 486SX-25/486SX-33/486DX-25(e.g. Commodore PC DT486DX-25 LOL) prices.

68EC030-25 and 68EC020-25 had a low price advantage against 386DX-25. "Power without the price" could been configured for the Amiga 1200 when 68EC020-25 and 68EC030-25 with Commodore's economies of scale instead of small accelerator companies taking the risk.

https://archive.computerhistory.org/...-05-01-acc.pdf
Page 119 of 981

For 1992
68000-12 = $5.5
68EC020-16 PQFP = $16.06, it's $15 in 1993 Q1.
68EC020-25 PQFP = $19.99, it's $18 in 1993 Q1.

68EC030-25 PQFP = $35.94
68030-25 CQFP = $108.75

68040-25 = $418.52
68EC040-25 = $112.50
---
Competition

AM386-40 = $102.50
386DX-25 PQFP = $103.00

486SX-20 PQFP = $157.75
486DX-33 = $376.75
486DX2-50 = $502.75

If Lew Eggebrecht's and Commodore engineers' AGA with the DSP3210 bundle was executed in 1991, A1200+ would have destroyed 386DX-40 and 486DX-33 competition.

Lew Eggebrecht wasn't in Commodore's hot seat from 1988 to 1991.

Ali fired Bill Sydnes after the A600 debacle and hired Lew Eggebrecht which is too late for the Amiga.

If Ali hired Lew Eggebrecht instead of Bill Sydnes, the outcome would be different.

Lew Eggebrecht managed to unify with Commodore engineers.

Last edited by hammer; 28 April 2024 at 05:10.
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Old 28 April 2024, 05:09   #3858
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Originally Posted by hammer View Post
OCS/ECS Agnus is designed around the 68000's memory access behaviors.

Fixing the sustain rate is better for general use cases.
Not so good, since 020 was there
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Old 28 April 2024, 14:48   #3859
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Originally Posted by sandruzzo View Post
If you left OCS with the same Ram, But with Trap Door ram Without Bitplanes penalties, and HW Registers as well, you'll have :

7 mb from chip mem
+ 7 mb from trapdoor ram
+ 7 mb from HW registers bus
+ 7 mb from "fast mem"

= 28mb peak rate, without expensive faster memory! Just better buses management

Quote:
Originally Posted by sandruzzo View Post
#hammer

I was talking about ocs/ecs, and peak rate.

From the CPU point of view following components are on the same bus, therefore you cannot add these values together:
Code:
7 mb from chip mem
+ 7 mb from trapdoor ram
+ 7 mb from HW registers bus
And peak rate for them is 3,5MB/s (16bit access every other chipset cycle)


In case of AGA: "chip mem": 7MB/s and 3,5MB/s for "HW registers bus" because they are 16bit.

Even Lisa, which is the only 32bit chip in the A1200, has 16bit path to the CPU:
https://jvaltane.kapsi.fi/amiga/howtocode/aga.html
Code:
For example, to change colour zero to the colour $123456

   lea      (CUSTOM.L),a0
   move.w   #$0135,COLOR00(a0)
   move.w   #$0200,BPLCON3(a0)
   move.w   #$0246,COLOR00(a0)
   move.w   #$0000,BPLCON3(a0)

Last edited by Cyprian; 29 April 2024 at 10:46.
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Old 29 April 2024, 03:23   #3860
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Originally Posted by Cyprian View Post
From the CPU point of view following components are on the same bus, therefore you cannot add these values together:
Code:
7 mb from chip mem
+ 7 mb from trapdoor ram
+ 7 mb from HW registers bus
And peak rate for them is 3,5MB/s (16bit access every other chipset cycle)


In case of AGA: "chip mem": 7MB/s and 3,5MB/s for "HW registers bus" because they are 16bit.

Even Alice, which is the only 32bit chip in the A1200, has 16bit path to the CPU:
https://jvaltane.kapsi.fi/amiga/howtocode/aga.html
Code:
For example, to change colour zero to the colour $123456

   lea      (CUSTOM.L),a0
   move.w   #$0135,COLOR00(a0)
   move.w   #$0200,BPLCON3(a0)
   move.w   #$0246,COLOR00(a0)
   move.w   #$0000,BPLCON3(a0)
https://www.amigawiki.org/doku.php?id=dearts:alice
Alice's shows 16-bit data pins i.e. DRD0 to DRD15. RGA has 8 pins. 32 bit Alice+ evolution wouldn't improve 2.5D/3D situation.

https://www.amigawiki.org/doku.php?id=dearts:lisa
Lisa shows 32-bit data pins i.e. D0 to D31. RGA has 8 pins.

Budgie handles 32-bit memory controller duties i.e. 32 pins D and 32 pins DRD.

Reference
https://www.amigawiki.org/dnl/schematics/A1200_R1.pdf

AGA has no problems displaying +50 fps 320x200 256 colors generated by a fast object manipulator e.g.
[ Show youtube player ]
Amiga 1200's AGA displaying Star Wars Dark Forces 68K with PiStorm32-Emu68 object manipulator.

[ Show youtube player ]
Amiga 1200's AGA displaying Beats Of Rage (OpenBOR 68K) with PiStorm32-Emu68 object manipulator.

Last edited by hammer; 29 April 2024 at 03:50.
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