Zorro III Bus Specifications wanted

[tnt23]

Originally Posted by wawa

@tnt23: have you surendered in the end?

It's not the end yet, and no, I haven't surrendered I am trying to figure what could be the issue with lha and big archives. Seems not depending on SDRAM core and chip, but rather on the Zorro side of things, or maybe at the border between Zorro and SDRAM controllers inside FPGA.

BTW, when running at 133MHz I got reads and writes cached which resulted in bustest reporting 14 megabytes (2^20) per second for block writes.

[wawa]

will be the same issue michael stomped over. i have been reporting it for longer already if im right, with the long constant max data transfer load (like multiple 100mb) z3 hangs up. i expect e3b worked around throotling the bus for a moment and initiating or issuing it again.or maybe it comes back again since it isnt completely dead by then (for what has been discovered). i have a deneb, and it seems to be working completely right in dma atm, so maybe solution has been found with the last update already. i might not be completely dma specific.

[tnt23]

Originally Posted by wawa

will be the same issue michael stomped over. i have been reporting it for longer already if im right, with the long constant max data transfer load (like multiple 100mb) z3 hangs up. i expect e3b worked around throotling the bus for a moment and initiating or issuing it again.or maybe it comes back again since it isnt completely dead by then (for what has been discovered). i have a deneb, and it seems to be working completely right in dma atm, so maybe solution has been found with the last update already. i might not be completely dma specific.

Might be the same issue, but might as well be not. I am not sure the Zorro part of my design is completely bug-free and robust.
Besides, my setup is Buster Rev.9 (no DMA) and Z3 memory is the only card in the system (no Deneb).

I would rather think the Zorro bus is not stuck in my case, as the system keeps running after the lha fails.

[alexh]

Originally Posted by tnt23

my setup is Buster Rev.9 (no DMA)

You mean Rev.7?

Rev.9 works fine for DMA.

[wawa]

uhhmm. your right, the other was a dma case..

[rkauer]

Hey, TNT23!

I finally got an A3000! Money waiting for a board. Hurry up!

[tnt23]

Originally Posted by alexh

You mean Rev.7?

Rev.9 works fine for DMA.

No, I mean my Buster is Rev.9 and there is no DMA on the Zorro side (the only DMA master I know of is Deneb, and it is not present here on 4000).

[tnt23]

Originally Posted by rkauer

Hey, TNT23!

I finally got an A3000! Money waiting for a board. Hurry up!

Congrats! Are you sure you want to fiddle with sloppy amateur board?

[alexh]

Originally Posted by tnt23

No, I mean my Buster is Rev.9 and there is no DMA on the Zorro side

Ah. Understood.

Originally Posted by tnt23

the only DMA master I know of is Deneb, and it is not present here on 4000.

• Fastlane Z3 SCSI
• A4091 SCSI
• Deneb

I think that is it?

[tnt23]

Originally Posted by alexh

• Fastlane Z3 SCSI
• A4091 SCSI
• Deneb

I think that is it?

Right, but I have only Deneb to choose from.

[rkauer]

Also the SCSI controller built-in in the A4000T is a bus master.

[tnt23]

Originally Posted by rkauer

Also the SCSI controller built-in in the A4000T is a bus master.

Well, I haven't got A4000T either, only plain A4000.

[alexh]

Originally Posted by rkauer

Also the SCSI controller built-in in the A4000T is a bus master.

Probably cos it is the aforementioned A4091 integrated into the motherboard.

[rkauer]

Originally Posted by tnt23

Congrats! Are you sure you want to fiddle with sloppy amateur board?

Of course I am! The cheaper, the better.

[tnt23]

Sooo, a friend proposed that I'd run LHA under some kind of debugger to see where/why it fails. The Enforcer turned out to be the right tool. It started reporting 'hits' every once in a while, even when there have been no visible problems with LHA or the system.



All of these hits are marked as BUS ERROR. Sometimes Enforcer adds (INSTR) tag to indicate the hit occured while at an instruction fetch. Some hits are caused by READs of all sorts (byte, word an long), some are WRITE related. I am especially excited to see bus errors within some unfortunate WRITE cycles, as I don't yet understand what could be the reason for these, as opposed to erroneous bus READs where data is being driven on the bus by the memory card.

The system seems to happily live with these errors, I believe due to the 030 being able to recover from bus error by rerunning bus cycle; unless it catches another error inside the bus error interrupt routine. This is where the LHA ends up with the Suspend/Reboot requester.

[Hewitson]

Wow.. Very impressive work.

I have just begun studying FPGA's, I hope to be able to embark on a similar project to this in the near future.

[wawa]

enforcer is a must tool for development. you would dont believe how much software that i supposed to be bugfree still causes hits, which maybe doesnt immaediately lead to a crash but eventually influence the stability of the system. im pretty sure all people that claim amiga os is instable are running some sort of superfacially working but faulty software. i observe it while i am running muforce (the further development of enforcer) in the background all the time. muforce comes with a full suite of further tools. if you have cpu with an mmu try it out.

[mboehmer_e3b]

Originally Posted by wawa

i have a deneb, and it seems to be working completely right in dma atm, so maybe solution has been found with the last update already. i might not be completely dma specific.

This one bug will only hit if Zorro III is heavily loaded, like it is with RAM cards, and the system using this RAM for operation frequently.
The workaround is not included in official firmware yet, only in some beta tester firmware.
And the solution is not as straightforward as you think :-)

It will be most likely being included with the next offical firmware update.

Michael

[mboehmer_e3b]

Originally Posted by tnt23

I am especially excited to see bus errors within some unfortunate WRITE cycles, as I don't yet understand what could be the reason for these, as opposed to erroneous bus READs where data is being driven on the bus by the memory card.

Then you apparently did not understand yet how a bus error is generated in Amiga Zorro III bus systems (though the mechanism is fairly simple).

The system seems to happily live with these errors, I believe due to the 030 being able to recover from bus error by rerunning bus cycle;...

This assumption is wrong. A bus error can lead to a cycle retry, but in most cases the cause of the bus error did already affect some other parts of the system, so simply rerunning the cycle will in most cases "hide" the problem, but does not solve it.
You may compare it with a landmine sleeping in the ground.

Michael

[tnt23]

Originally Posted by mboehmer_e3b

Then you apparently did not understand yet how a bus error is generated in Amiga Zorro III bus systems (though the mechanism is fairly simple).

Pretty obvious I did not. The only sources of information I have been using were the Z3 docs, not too helpful on the matter of bus errors, and the 68030 manual which is very detailed but unfortunately has nothing to say on Zorro bus. There is also a badly scanned Zorro bus patent. Should there are other papers worth looking at, I'd be glad to know.

This assumption is wrong. A bus error can lead to a cycle retry, but in most cases the cause of the bus error did already affect some other parts of the system, so simply rerunning the cycle will in most cases "hide" the problem, but does not solve it.

I've got the same very impression, that's why I am happy to see the Enforcer's output.

You may compare it with a landmine sleeping in the ground.

Thanks Michael, I will.