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#261 | |
Registered User
Join Date: May 2017
Location: Munich/Bavaria
Posts: 2,426
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"Ramsey" is the chip dealing with the RAM - and yes it supports the 030 Burst-Mode with Fast-Page and with Static Column |
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#262 |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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![]() I wanna see those shorter damnit! They hypnotise me ![]() EDIT: this is an 68020 being forced to pretend its a 68K.. but you get the idea. |
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#263 |
Registered User
Join Date: Jul 2017
Location: San Jose
Posts: 676
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Can the FPU operate while the cpu is waiting for the bus? Maybe one could hide float calculations in the latency of cpu memory access. I’m thinking of for instance hiding fpu calculations in a C2P routine which are largely chipmem access bound (“at write speed”) on 040 or 060. So instead of twiddling thumbs, while the cpu is waiting for the writes to go through, the fpu could continue producing results...
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#264 |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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68k details
The plain 68000 doesn’t even have a coprocessor interface. It needs memory mapped and thats 4 cycles and some CPU reads/writes to do it. It’s pretty awful in terms of setup.
Once the FPU has what it needs it’s less awful and can indeed spend lots cycles executing internally without blocking anything. But it cant read or write to ram itself. Even instructions have to be issued by the CPU But I’ll forgive the plain 68000 for being awful here as the coprocessors didn’t exist when the chip was designed. |
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#265 |
ex. demoscener "Bigmama"
Join Date: Jun 2012
Location: Fyn / Denmark
Posts: 1,642
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#266 |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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68k details
Completely randomly i started thinking about what biscuit a CPU would be if it were one... starter for ten...
Z80 = Stale Ginger Snap 6502 = Custard Cream 8086 = Rich Tea 68000 = Plain Digestive 68020 = Plain Chocolate Digestive 68030 = Milk Chocolate Digestive 68040 = Caramel Digestive 68060 = Banoffee Caramel Digestive ARMv2/v3 = Hobnob ... Silly but... |
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#267 |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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Ok that was a bit strange... even for me.
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#268 |
Registered User
Join Date: Jul 2018
Location: Birmingham, UK
Posts: 185
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8086 is totally rich tea.
We need to admit to ourselves that the rich tea, no matter how you dress it up, is not a good dunker. They’re best eaten crisp, dry and on their own, rather than the soggy mess you’ll get when dunked. My Amiga 500+ has a 33mhz 68000 that can outperform an A1200 at 16-bit stuff. Would this faster digestive be spinning too fast to maintain its structural integrity and become a cheesecake base? The system also has 8MB of fast Ricotta And Mascarpone. Tortured, that joke was. |
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#269 |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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Actually the z80 is a water biscuit
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#270 |
Registered User
Join Date: Jul 2018
Location: Birmingham, UK
Posts: 185
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#271 |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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#272 |
Registered User
Join Date: Jul 2014
Location: Finland
Posts: 1,186
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Some cracking jokes you got there.....
(i'll show myself out) |
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#273 |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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#274 | ||||||||
Registered User
Join Date: Mar 2016
Location: Ozherele
Posts: 229
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Thanks to everybody who has paticipated the discussion. I meanwhile have prepared some more texts. I can even have translated my article about Motorola 6800 family - https://litwr.livejournal.com/1396.html
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Try to ask yourself why 68040 has shortcomings? Maybe because its ISA was too bulky and large to support in 1990... Intel ISA was much lighter that year and it had fairly won the race. It is an interesting challenge but 100-200 instructions of high optimized code can require more than a day. I am ready to this contest only if we limit ourselves to no more than 50 instructions. Quote:
I have written at least 50000 lines of x86 codes. I am even the author for the first in our world emulator for the one of the best Commodore computers - http://litwr2.atspace.eu/p4_download.html ![]() Why did IBM choose 8088? IMHO Because it was the best for that time. Indeed the word the best means the best overall: in speed, in price, in availability, in reliability, in prospectivity, etc. 68000 was more expensive and had only several minor advantages. I have written about several x86 oddities with opcodes but they don't affect practical programming. BTW thanks for the mention this double TEST issue. It looks like that you try to transfer you inability to handle modern and complex processors to these processors themselves! It looks quite illogical. I have heard that a mirror can help in some such cases. Be less lazy, work hard and all x86 surrender to you. ![]() Quote:
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I can repeat that up to the second half of the 80s RAM amount above 1 MB was an enormous luxority. Who could afford it in 1982? Almost nobody. Intel 80286 was released in 1982 with the support of 16 MB too - it was much more right time for that amount of RAM. Motorola forced users to pay for features that couldn't be used. Indeed 16 MB theoretically was fantastic but practically it was just a pretty illusion. How many ppl had Amiga 500 with more than 1 MB memory in 1990? I think only a few. That time cheap 80286 and even 80386 systems became widely available and they were up to ten times faster than 68000 at 7 MHz. Quote:
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I have written that 68000 full address requires 4 bytes to load and one of them is excessive but you have to load it too. Why people try to compare x86 and 68k here? Let's talk about them separately. It is not about what is the best thing. All things in this world have their flaws. ![]() Quote:
I think you underestimate 6502. It can be very fast with byte manipulations, control structures, boolean data, ... Try to imagine, for example, a loop which has to add 77 to each byte in 4 KB byte array. 6502 @2MHz can beat 68000 @8MHz here. Indeed 16/32-bit arithmetic is faster with 68000 and division is much faster. Thank you for the benchmark link. However it confirms my point that 68000 is generally a bit faster than 8086 and about 50% slower than 80286. Let's see the best values for each CPU. Sorry but I can't still get any fact that contradicts the content of the article. I have some personal points of view only. Indeed relative jumps at 8086 or even 80286 are poor point but 8088/8086 executes one branch jump for 4/16 clocks (10 on average) and 68000 for 12/18 cycles (15 on average). 80286 requires only 3/7-11 (6 on average) in this case. Quote:
I remember playing https://en.wikipedia.org/wiki/Defender_of_the_Crown . I played in with my A500 but later I tried it with IBM PC clone. The PC graphics and sound looks much poorer (I used CGA and the beeper) but PC version has some additional animations and features. So it were generally similar but different games. I agree that with 32-bit arithmetic 68000 is quite possible only slightly slower that 80286 but with 16 bit it is much slower. Indeed 68000 is much faster that 8088 with 16-bit arithmetic. I agree that 8088 or even 8086 is generally slower than 6502 at the same frequency but it can be faster in some important cases. I can't understand why 16000 interrupts per second so impressed you - it is possible even with 6502 @1MHz. Indeed 68030 is even IMHO better than 80386. The locked add is enough for the implementation of a mutex but if you want something more complex like https://en.wikipedia.org/wiki/Non-blocking_algorithm you will need more complex instructions. However, the short sequence MOV AX,mem; TEST AX,const at 8086 can be faster than TST mem with 68000. Of course, for the code density 68000 relative jumps can be better sometimes. However 8086 can use sometime 2 bytes for such jumps, in a 16-bit jump case it is still only 5 bytes. @meynaf, thank you very much for your 68000 shortcomings list. Last edited by litwr; 01 September 2018 at 19:31. |
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#275 | ||
Defendit numerus
Join Date: Mar 2017
Location: Crossing the Rubicon
Age: 54
Posts: 4,491
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Anyway known by 68k programmers who can use the alternative that I have suggested that has no problems and is faster. Quote:
How you can have a full 32bit machine without a 4 bytes register? (every Amiga programmer know the bad from upper byte alternative usage..) Ok, you have 24 address lines but the project was for a future full 32bit addressing support from the start. And if you like a '0 page' you can have two with the short form lea .w (the upper page really even used by Atari ST for custom register). Or you prefer the segmented 8086 horror? Cheers ![]() |
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#276 | |||||||||||||||||||||
son of 68k
Join Date: Nov 2007
Location: Lyon / France
Age: 51
Posts: 5,355
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Why ?
No, this is not true. If it's external then you can choose what's there and what's not. Quote:
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![]() But perhaps you know the x86's density will start to fail if you go over that amount ? Well, anyway. That's ok for 50. Just give me a little time to find a suitable routine (or choose one if you prefer). Quote:
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YOU are the one with the unusual claims. So YOU have to prove what you say. Quote:
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If they wanted speed, they would at least have chosen 8086. 68000 didn't have just minor advantages : if it weren't for the IBM PC, it would have killed intel. But IBM did not believe that their 5150 could have a future (yes they were that stupid) and preferred low price over quality. They could already buy cheap intel chips and this is what they did. They didn't bother copyrighting more than the BIOS and we all know the result. https://forwardthinking.pcmag.com/ch...-an-intel-8088 Quote:
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That's preposterous, really. What's your goal when coming here anyway ? You look like a troll, coming here to get trouble. You come on a rather 68k-oriented forum and say basically that 68k sucks and x86 rules. What do you expect ? That some of us will end up so pissed off they will lose their self-control, write name-calling and ultimately get banned ? Quote:
First, it doesn't work "fine". It took Microsoft 20-30 years to get it roughly right (vs a few months for Sassenrath to write Exec). Second, that's for protected mode ONLY (where, how odd, you DO have several stacks). In fact x86 is so poor in multitasking they had to put several cores in the same chip to have a proper one ! Quote:
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Because for 68000 it looks like 16 clocks for ADDI, 10 for DBF. For beating this a 2Mhz 6502 needs to do it in 6 clocks per byte - mere LDA+STA pair already covers this easily. Quote:
But it's quite easy to find the same game (with exact same features !) for two platforms and compare executable size, even though this is biased because of compiler differences. This is why i keep asking for actual code. Quote:
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According to googled doc : http://www.oocities.org/mc_introtoco...ion_Timing.PDF MOV AX,mem is 8+EA. TEST AX,const is 4. 68000's TST is 4+EA (with perhaps EA somewhat larger than x86's). And forget it if you know some "special case". Statistically it's insignificant in comparison to the 68000 performing MOVE and just use the CCR without using TST. Quote:
The situation is exactly the same on the 2 for short branches. Now if you want to be intellectually honest, it's your turn to write your 80x86 shortcoming list ![]() |
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#277 | |
son of 68k
Join Date: Nov 2007
Location: Lyon / France
Age: 51
Posts: 5,355
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I have an idea. Bresenham line draw routine. Quite a classical algo i guess. My 68k version will take d1-d2=pos, d3=pixel color, d4-d5=offset (diffs from new coord). You're free to choose which x86 regs you're gonna use. You may even use the stack for parameters if you prefer. Only thing - routine must not alter the caller's registers so you have to save the ones you use, 'xcept the position (here d1-d2) which need to be updated upon exit (else it wouldn't be fun). Can/must call external (= does not need to be written here), set single pixel routine (d1-d2=x,y, d3=color) - but which is assumed to be located close enough for short call/jsr. Is that ok ? It's straightforward, simple routine. |
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#278 | |||||||
Registered User
Join Date: Jul 2015
Location: The Netherlands
Posts: 3,437
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The video is particularly interesting as it shows the problem in action. https://blogs.msdn.microsoft.com/lar...-old-cpu-bugs/ http://www.vcfed.org/forum/archive/i...p/t-41453.html [ Show youtube player ] Quote:
To save some space, I've attached the code and cycle counts to this post as a text file. Here's the results, where all cycles have been converted to 8Mhz cycles (i.e. the 2Mhz 6502 cycle count has been multiplied by 4): Code:
6502@2MHz vs 68000@8MHz Adding 77 to each byte in a 4k array (no rippling carry) Normal code: 6502 - 279304 8MHz cycles 68000 - 90418 8MHz cycles - 68000 is 3.1x faster Fully unrolled code: 6502 - 163840 8MHz cycles 68000 - 49164 8MHz cycles - 68000 is 3.3x faster Quote:
The best posted values for the 8086, 286 and 68000 in that document were: Code:
IBM PC/XT 8086-9.54Mhz 980 980 IBM PC/STD 80286-8Mhz 1724 1785 WICAT PB 68000-12.5Mhz: 1780 2233 ![]() But my point here was (and you apparently missed this) that there is huge variation - even at the same clock speed. The fastest 68k ran at 12.5Mhz, yet the Plexus P/60 MC68000-12.5Mhz, which also ran at 12.5MHz only managed a score of 1111 and 1163. Similar things can be spotted for all the CPU's in that table - there are a whole bunch of different results even for systems running at the exact same clock speed. To me this proves that using 1980's benchmarks to try and see which computer is fastest is a really bad idea. Quote:
"Even the address registers, while seemingly superior to the 8086 segment registers, have a number of annoying disadvantages. For example, they needed to load as much as 4 bytes instead of two for 8086 and of these four, one was extra." This is false. The move.w <ea>,An command lets you load in two bytes into an address register instead of four. You do not need to load 4 bytes at a time into an address register on 68000. This has been pointed out by me and others. Several times. Quote:
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instruction displacement branch branch taken not taken Bcc byte 10(2/0) 8(1/0) word 10(2/0) 12(1/0) BRA byte 10(2/0) word 10(2/0) Last edited by roondar; 01 September 2018 at 16:42. |
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#279 |
Registered User
Join Date: May 2014
Location: inside the emulator
Posts: 377
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An IBM XT with not only a 8086 but one at 9.54MHz? I think that isn't correct, really sure about that in fact.
The XT had a 4.77MHz 8088 and the next step in the lower segment of x86 was a PS/2 model with an 8MHz 8086. It could be a clone however then it wasn't an IBM machine at all. |
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#280 |
Registered User
Join Date: Jul 2018
Location: Birmingham, UK
Posts: 185
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Daddy, Why is everyone arguing about processors that are over 30 years old?
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