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#2441 | |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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Quote:
Oh if only the ST had an autoconfig system. EDIT: There is barely any changes in the RAM CPLD between 50Mhz and RC1. Try disabling the CPU caches with the jumper next to the CPU and tell me what happens. Maybe the ROM caching is causing issues. |
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#2442 | |
Registered User
Join Date: Jun 2016
Location: Stoke-On-Trent, England
Posts: 450
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Quote:
4MB is a nice speed, is that with the stock scsi.device or are you using Don_Adan's scsi.device? Last edited by kgc210; 14 January 2018 at 10:02. |
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#2443 | |
Retro maniac
Join Date: Feb 2017
Location: near Munich / Germany
Posts: 486
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Quote:
PS nice teaser Stephen! seems that we will have first SPI based device soon!!! You're amasing! What about Wi-Fi? any ideas about it? Last edited by 8 Bit Dreams; 14 January 2018 at 13:23. |
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#2444 | |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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Quote:
I am going to setup the hardware and document the port but I’m really not wanting to learn how to write device drivers. Any volunteers? |
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#2445 |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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#2446 |
Registered User
Join Date: Jun 2016
Location: Stoke-On-Trent, England
Posts: 450
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On the 540 board are you keeping separate CPLD's for the RAM and BUS or are you combining them?
What I would like to do is to take your RAM bit of the board and put it on a little board with just the RAM and an 040 or 060 socket and use it on the A3640 / A3660 board. I did look at the files for the GBA060-TK but the RAM CPLD connects to the other CPLD's on the board and I don't understand the code enough to see what it relies on. I don't know if it will work but want to give it ago. |
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#2447 |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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The 040 board doesn’t have a socketed CPU so that’s a non starter. The bus is a redesign from scratch so is is not really comparable with the 530 line.
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#2448 |
Registered User
Join Date: Jun 2016
Location: Stoke-On-Trent, England
Posts: 450
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I meant I would design a new board to sit between the A3640 and the 040 chip but use the code from your RAM CPLD on the 540 and the same RAM Chips to make a board like the X-Calibur.
http://amiga.resource.cx/exp/xcalibur |
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#2449 | |
Retro maniac
Join Date: Feb 2017
Location: near Munich / Germany
Posts: 486
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Quote:
http://amiga.resource.cx/exp/professional530 it's a nice accelerator board, however, pretty useless without RAM extension and IDE interface. people have these accelerators here in Germany (these was sold for affordable price back in the day's) unfortunately, ram extesion wasn't cheap, so many of them are w/o additional RAM boards. Second problem - original RAM extension wasn't autoconfigured, it means, you need to addmem each time you reboot the system.. Maybe it is possible to adopt TF328 for these needs, as Brian did to fit it into A1200.. Maybe an adaptor without any changes to TF328? That would be perfect! Is it ever theoretically possible? Was searching for schematics or info about expansion port pinout without any luck tough.. |
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#2450 |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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You realise that I’m planning an 060 board for the 4000 with the ram integrated right after the 540?
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#2451 |
Registered User
Join Date: Mar 2003
Location: UK
Age: 51
Posts: 214
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#2452 |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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#2453 | |
Retro maniac
Join Date: Feb 2017
Location: near Munich / Germany
Posts: 486
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Quote:
![]() ![]() seems that 2018 will be not less impressive as 2017 was! fasten Your seatbelts dear Amigans, Stephen will take us in 7th heaven!!! (hope, You'll extend Your pilot licence, Steve ![]() |
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#2454 |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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Well it thought it was obvious when i bought a stock of KEL connectors.
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#2455 |
Registered User
Join Date: Sep 2017
Location: birmingham, uk
Posts: 548
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Stephen, Well done on the SPI port very nice work! Look forward to some exciting things. Any chance this can be implemented in the tf328 as current hardware stands?
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#2456 | |
Banned
Join Date: Sep 2016
Location: UK
Posts: 2,917
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Quote:
EDIT: Be really useful if someone could review the Wiki for my SPI port. |
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#2457 | |
Registered User
Join Date: Sep 2017
Location: birmingham, uk
Posts: 548
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Quote:
![]() Regarding the 'Serial Peripheral Interface' whats the maximum bandwidth we're meant to expect from it? Assuming 20Mbits/sec ? Edit: wait perhaps I'm dreaming here to expect such high speeds ![]() Wikipage looks tasty but don't know enough to criticize anything. Link you posted on http://eab.abime.net/showpost.php?p=...postcount=2440 incorrectly goes to the add a new page form. should be https://github.com/terriblefire/tf53...I-Port-(alpha) but this site breaks the url on first paste. must edit. Last edited by solidcore; 14 January 2018 at 22:44. |
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#2458 |
Registered User
Join Date: Jul 2017
Location: Munich / Germany
Posts: 88
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#2459 |
Registered User
Join Date: Apr 2017
Location: Springfield, MO
Posts: 264
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#2460 |
Retro maniac
Join Date: Feb 2017
Location: near Munich / Germany
Posts: 486
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