27 September 2020, 00:33 | #221 | |
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Pentium 200 and Pentium Pro 200 MHz was the flagship SKUs along with 3DFX Voodoo 3D accelerator. Phase 5' 68060 + Cybergraphics 64 + Amiga 4000/030 wasn't price competitive at 1996 time period. Amiga 4000 wasn't built as lower cost mini-tower with a single micro-ATX size motherboard. In modern times, PC has Microsoft Flight Simulator 2020 and just bought out Bethesda's parent company, hence keeping critical PC games on the PC. Sony poked the bear enough and the bear counter attacks (using it's massive cash reserve). At least Apollo team targeted Amiga 500 price range for Vampire V4 despite the +5000 units. Amiga Technologies and Motorola couldn't deliver preformance upgraded A500/A1200 replacement. Last edited by hammer; 27 September 2020 at 00:52. |
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16 October 2020, 21:38 | #222 |
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Not much happening here, but let's still leave off-topic crap out of this thread
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14 June 2021, 14:44 | #223 | |
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are you still on that topic? I saw that you been making some stuff using mode7 I guess? Can it be used to generate floor in raycaster, for example adding a floor to that wolf3d you worked. I am asking because, I am working for some time on my own raycaster engine under RTG and 32 bit.. I have highly optimed the walls rendring with shading, but floors/ceilings are very cpu expensive to calculate.. I tried many different algorithms, like: horizontal and veritcal scanline approach, also tried to make a triangles from cells and rasterize them. But always the cpu calculations are too high. I think the main problem is, that I can use different texture per floor cell - with only one texture the calculations are much faster. I wonder - if I could use mode7 technique to render faster that tiled floor? But I am not sure. The examples of mode7 are always operating on single texture. For example in my case - in single room my floor can be made of ex. 8 single square textures. Or maybe render every single floor cell in mode7 technique - but I don't know if that possible too - the mode7 examples looks like they fill the whole screen to infinity.. |
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24 June 2021, 08:04 | #224 | ||
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18 March 2023, 14:19 | #225 |
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Any new updates on Wolf3D?
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18 March 2023, 16:39 | #226 |
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Didn't Dread have a Wolfenstein demo? Runs full speed on the A500 I think. There is also:
[ Show youtube player ] |
15 May 2024, 01:11 | #227 | ||
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https://bigbookofamigahardware.com/b...t.aspx?id=1604 Quote:
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15 May 2024, 05:02 | #228 | ||
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But let's say Commodore did give us 'Optimized Blitter assists' c2p source code better than anything we could make ourselves. That would spoil the fun! So I'm glad they didn't. I'm also glad that they didn't put a chunky mode in the A1200, because that would be even more boring. |
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15 May 2024, 05:28 | #229 | ||||
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Releasing ROMs without matching official SDK documentation is crazy. Quote:
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Useless for the higher unit sales A1200. Quote:
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15 May 2024, 20:28 | #230 | |
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If I was present, I'd certainly suggest that some kind of blitter-like functionality would be preferred. With a bunch of pointer registers for each bitplane, along with maybe a modulo value for each and a BLTSIZE type register to set the thing in motion with no further intervention from the CPU being needed from that point. I guess that might be a much more complicated thing to design, but presumably within the limits of the possible for these people to create? B |
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15 May 2024, 20:36 | #231 |
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Re:blitter based C2P
It's been done but not in time. Grind and the engine it's based on use blitter for chunky to planar conversion. On an A500 it gets playable frame rates at a low resolution. |
15 May 2024, 20:52 | #232 | |
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16 May 2024, 15:30 | #233 | ||||
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For your convenience, the autodoc for the new V40 WriteChunkyPixels function is attached below. All CD32 developers should have the full V40 OS for their development machine, and V40 autodocs, includes, libs, and fd's. Archives of the V40 Workbench disks, V40 kickfiles, and V40 development files may be downloaded from our closed developer conferences on BIX (US), ADSP (Europe), and CIX (UK). graphics.library/WriteChunkyPixels graphics.library/WriteChunkyPixels NAME WriteChunkyPixels -- write the pen number value of a rectangular array of pixels starting at a specified x,y location and continuing through to another x,y location within a certain RastPort. (V40) SYNOPSIS WriteChunkyPixels(rp,xstart,ystart,xstop,ystop,array,bytesperrow) A0 D0 D1 D2 D3 A2 D4 VOID WriteChunkyPixels(struct RastPort *, LONG, LONG, LONG, LONG, UBYTE *, LONG); FUNCTION For each pixel in a rectangular region, decode the pen number selector from a linear array of pen numbers into the bit-planes used to describe a particular rastport. INPUTS rp - pointer to a RastPort structure (xstart,ystart) - starting point in the RastPort (xstop,ystop) - stopping point in the RastPort array - pointer to an array of UBYTEs from which to fetch the pixel data. bytesperrow - The number of bytes per row in the source array. This should be at least as large as the number of pixels being written per line. RESULT NOTE xstop must be >= xstart ystop must be >= ystart The source array can be in fast RAM. ===chunky-to-planar conversion HW: GfxBase->ChunkyToPlanarPtr is either NULL, or a pointer to a HW register used to aid in the process of converting 8-bit chunky pixel data into the bit-plane format used by the Amiga custom display chips. If NULL, then such hardware is not present. If an expansion device provides hardware which operates compatibly, than it can install the HW address into this pointer at boot time, and the system will use it. This pointer may be used for direct access to the chunky-to-planar conversion HW, if more is desired than the straight chunky-pixel copy that is performed by WriteChunkyPixels(). If using the hardware directly, it should only be accessed when the task using it has control of the blitter (via OwnBlitter()), since this is the locking used to arbitrate usage of this device. The hardware may be viewed as a device which accepts 32 8-bit chunky pixels and outputs 8 longwords of bitplane data. For proper operation, exactly 8 longwords (containing 32 pixels) of chunky data should be written to *(GfxBase->ChunkyToPlanarPtr). After the data is written, bitplane data (starting with plane 0) can be read back a longword at a time. There is no need to read back all 8 longwords if the high-order bitplanes are not needed. Since WriteChunkyPixels is not (currently) particularly fast on systems without the chunky-to-planar hardware, time critical applications (games, etc) may want to use their own custom conversion routine if GfxBase->ChunkyToPlanarPtr is NULL, and call WriteChunkyPixels() otherwise. This pointer is only present in GfxBase in versions of graphics.library >= 40, so this should be checked before the pointer is read. Quote:
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16 May 2024, 15:37 | #234 |
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Adding C2P hardware to a ram card would be pointless unless it was a direct register/address compatible replacement for akikio as nothing would use it otherwise.
Akiko is not an ideal C2P anyway. If it lacks one thing that could have really helped, it's the ability to write to chip memory itself: start of each frame, set your base plane pointers (or just one and a stride value if you assume planes are allocated contiguously) and just keep smashing your chunky pixels at it while it knocks the planar data out the back door, incrementing the pointers as it goes. That would've been nice. |
17 May 2024, 10:33 | #235 | |
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17 May 2024, 10:53 | #236 |
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Back on topic, what's the latest with the raycaster?
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17 May 2024, 23:06 | #237 |
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I agree with all points by Bruce Abbott, except the last one - a chunky mode to spoil the fun would have been great with the improved DMA speeds of A1200. I even called up a Commodore-Amiga representative to tell him so back in the day - before AGA. Ah, the innocence of youth.
I also agree with Karlos, to get back on topic, which is: the Amiga didn't get a HW chunky mode. It's a fact. Now, how can the Amiga do even greater things? |
18 May 2024, 11:04 | #238 | ||
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However one thing most RAM boards and accelerator cards had was an FPU socket. Imagine plugging a different chip in there that did other stuff like c2p and DSP! |
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18 May 2024, 11:15 | #239 |
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Back on topic, I checked out the Sega Mega Drive homebrew Wolf3d port that only uses 16 colors and still looks pretty good! If the textures were pre-converted to 16 or 32 colors then it could be a lot faster.
What's the speed of 4 and 5 bitplane c2p vs 8 bitplanes, in AGA (2x fetch mode)? Could the blitter be used to make it even faster? |
18 May 2024, 12:05 | #240 | ||
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