An alternate history without "slow" or "fake fast" memory

[absence]

Most of the non-Zorro Amiga models (specifically 1000, 500, 500+, and 600) were designed to be upgraded with memory expansions. These expansions doubled the availabe memory, and except for on the 500, it was all chip memory. Even on the 500, the memory is connected to the chip memory bus (and thus slow), and can relatively easily be configured into real chip memory, as long as the Agnus chip is capable of the full size. I don't think it's too far-fetched to assume that the original plan for the 500's memory expansion was to double the amount of chip memory, but for whatever reason, Commodore didn't have a capable Agnus chip ready for the 500's launch, and worked around the problem with minimal changes.

If we imagine that the 500 followed the same pattern as the other models, meaning that developers could rely on the common configuration of 1 MB memory being all chip memory, would it have meaningfully affected the potential of the software? There are certain obvious situations, like being able to use more samples in Protracker, but what about games and demos in general? Were they typically constrained by having half the amount of chip memory, or wasn't it such a big deal? I haven't done nearly enough Amiga programming to say, but what do those of you who have think?

[alpine9000]

Even better would have been if the standard 512k expansion would have been fast ram. Games would have been much better. 512kchip 512k fast would be a dream base config for most developers.

[AestheticDebris]

I think it's a bit of a no brainer that more chip ram would've been preferable. Slow ram was basically a hack that gave you the worst of both worlds. Given that you needed chip ram for most things and fast ram wouldn't be that much faster on a stock A500, pretty much any developer you asked would probably have wanted more chip.

Whether it would have made a noticeable difference in the end products is harder to say, but it probably would have saved a lot of developer effort juggling things around in ram to avoid disk loading whilst keeping what is useful accessible to the chip set.