15 May 2024, 14:34 | #41 | |
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Quote:
My idea is/was to set X=C bit for all emulated 6502 instructions which set Carry. For me it will be perhaps easiest and fastest to handling with subx and add, but maybe im wrong? Of course the best speed for 8bit emulation is pseudo JIT, something similar to JOTD's Z80 transcode, but not as source, but as 68k binary or exe file. |
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16 May 2024, 12:33 | #42 |
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After next rethinking time.
Much funniest and maybe more challenging will be created 6502 emulator without emulating CCR. For 68020+ this is possible, for 68000 impossible (with good speed), I think. |
17 May 2024, 09:19 | #43 |
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Something like this:
Code:
lea Emu00,A6 ; can be used for store variables too subq.l #1,A0 move.w (A0)+,A5 ; temp add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 jmp (A6,A5.W) . . . Emu80 .... subq.l #1,A0 move.w (A0)+,A5 ; temp add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 jmp (A6,A5.W) Emu80End ds.b 256-(Emu80End-Emu80) Emu00 ; emu base .... subq.l #1,A0 move.w (A0)+,A5 ; temp add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 jmp (A6,A5.W) Emu00End ds.b 256-(Emu00End-Emu00) Emu01 .... subq.l #1,A0 move.w (A0)+,A5 ; temp add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 add.l A5,A5 jmp (A6,A5.W) Emu01End ds.b 256-(Emu01End-Emu01) . .. I dont know how fast/slow are others loop routines with CCR emulation. Then I dont know how fast/slow it can be. |
25 May 2024, 08:53 | #44 | |
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If my (in head) computations are Ok, then 68030 50 MHz can emulate 8bit CPU's at 2-3 MHz. 68000 7 MHz can emulate 8 bit CPU's at about 0.2MHz. Previously I thinked that 68000 cant emulate 8 bit CPU's with good enough speed. But I was wrong, with coding tricks can. Only 22 or 26 cycles are necessary to access 8 bit instruction. Plus cycles necessary to emulate 8 bit instruction. |
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