08 April 2021, 20:46 | #161 |
Registered User
Join Date: Sep 2006
Location: New Sandusky
Posts: 944
|
Any hope of adding some "free sex and beer" address pins that we could wire to other parts of the board to let it use larger slow RAM expansions as chip RAM? Or even just include RAM that occupies slow RAM address space on the chip itself? (Obviously would require either patched ROM or something in the startup sequence to swap the memory type to chip)
|
09 April 2021, 11:53 | #162 |
Registered User
Join Date: Sep 2013
Location: Beeston, Nottinghamshire, UK
Posts: 240
|
Nice work on the project! It's really cool seeing you all developing this stuff.
This is the repo' I assume. https://github.com/jbilander/ReAgnus |
15 June 2021, 23:40 | #163 |
Mighty Pirate
Join Date: Dec 2017
Location: On the borderline
Age: 44
Posts: 177
|
As it turns out, after quite some time someone finally understood that Open Hardware is about trying to do your part rather than coming up with heaps of useless talking and moaning or blatant stealing and allowed this project to reach the next milestone.
So despite knowing he could be jumping into the void, fellow Italian living in Japan Edoardo Auteri put confidence, money, time and effort into assembling a board. He had some initial issues but these were tracked down to a faulty Paula chip. After replacing it the board booted right away so he went on with thorough testing of almost all system components:
Basically he tested everything except the Parallel Port and the Edge Expansion Connector. The board fully passed every test, proving to be perfectly stable and reliable. Edoardo only encountered one minor issue plus another one I was already aware of, as it had been reported by @LIV2, both of which were easily corrected. He also came up with a number of suggestions for improvements which I incorporated in a new revision of the board which is now under testing. The new board will be released as soon as it has been tested. The full design files will be available but I changed the license to CC BY-NC-SA. TBH, if it were for me, I wouldn't have released any sources any more but I felt that Edoardo did such a huge job that he deserved to be the one to choose what to do (besides getting his moniker among the credits on the silkscreen). He chose to keep it open source and so be it. This means the "community" will soon get fully tested schematics and gerbers for an Amiga 500+. A lot of great things could be born from these, let's see what happens. Someone else I would like to thank is an Englishman named Ibrahim Imran: he ordered some boards and even sent one to me for free. He intended to try and assemble one but was halted by personal circumstances. I am a bit worried because I tried to get back in touch with him several times but he never replied. I hope he's doing well. The board he sent me was first of all a pleasant gift (you know... after 2 years of work on that project, you finally get a physical board in your hands, aaaaaah!) but it also proved very useful for testing the dimensions, connector placement and choosing positions for the new features. One more time, this is a small example of how the open development model works and how it thrives when everybody does a little bit. I really wish the "community" really took this to heart and started supporting open projects rather than the selfish and greedy speculators they are standing up for right now. Last edited by SukkoPera; 15 June 2021 at 23:52. |
16 June 2021, 01:46 | #164 |
Registered User
Join Date: Jul 2017
Location: Brisbane / Australia
Posts: 13
|
What a beautiful piece of work.
Great job Edoardo, Ibrahim and SukkoPera! I think it's time to for me to learn to solder! |
16 June 2021, 03:29 | #165 |
Golden Boy
|
|
16 June 2021, 12:14 | #166 |
Registered User
Join Date: Apr 2010
Location: Italy
Posts: 1,136
|
Good job my friends
|
16 June 2021, 12:45 | #167 |
Registered User
Join Date: Sep 2017
Location: IT
Posts: 178
|
|
16 June 2021, 14:26 | #168 |
Mighty Pirate
Join Date: Dec 2017
Location: On the borderline
Age: 44
Posts: 177
|
KS Switcher and Drive Switcher were already integrated into V1. The things we added in V2 are some "commodities" that are nice to have but nothing major, as we still want to avoid any significant rerouting.
|
16 June 2021, 19:06 | #169 |
Registered User
Join Date: Jul 2017
Location: Germany
Posts: 205
|
Very great work from Sukko and all their helpers. Thanks a lot for all your hard work you are doing for the community
|
16 June 2021, 21:43 | #170 |
Registered User
Join Date: Aug 2014
Location: Netherlands
Posts: 699
|
Wow.... Great work!
This is indeed how open source hardware should work! @sukkopera, all of the (small) hardware stuff I've done for the Amiga i've released as "free" / public domain without using any specific license. The 14Mhz accelerator I am doing I plan to release under CERN-OHL-S V2. From what I understand of it, this still allows someone to sell complete products based on the design as long as they release all original sources and changes. You did not choose this license, why? PS; in the case of the 14MHz accelerator it is actually a bit tricky as it builds on some work by others. Following the rules I would have to get their consent to release this under the CERN license. Otoh, i have changed so much that the original design is barely recognizable anymore... |
16 June 2021, 21:46 | #171 |
Registered User
Join Date: Aug 2014
Location: Netherlands
Posts: 699
|
And, in the spirit of open hardware, I would like to make a design question/suggestion (and implement it if desired): My A500 sufferers from these annoying vertical clock inteference lines when connected to an LCD. Does this design fix this? Do we know how to fix it?
|
17 June 2021, 07:38 | #172 | |
Golden Boy
|
Quote:
First of all, appreciated the kind interest and positive comment. Concerning the LCD issue, based on my experience, is due to (1) poor grounding/shielding of the original A500 motherboard (any Rev.) and (2) not buffered digital H- and V- which are straightforwardly exposed to the DB23 output connector. Well, V2 already offers improved grounding (1) and optionally (2, if not genlock used) the onboard buffer for digital sync signals. of course, the PCB is still a 2Layer stack-up. 4Layer would be a picture-perfect solution yet not cheap. A cost-effective DIY solution implies a trade-off. Last edited by kinmami; 17 June 2021 at 07:41. Reason: typo |
|
17 June 2021, 08:20 | #173 | |
Mighty Pirate
Join Date: Dec 2017
Location: On the borderline
Age: 44
Posts: 177
|
Quote:
I haven't read V2 of the CERN license yet, but V1.2 is what most of my open stuff is released under. Now, the reason I used to release everything as an open project is because I hoped that someone else could take it and evolve it or derive something from it. This did not happen very often, while people taking my designs and selling them at ridiculous prices happened much more often. I believe this project will spark quite some interest and speculators will dive in pretty soon. With a NC license I can stop that. I will add a clause that if anybody would like to do a major contribution and is prevented to do so by the NC license, they can ask and they will be granted a separate more permissive license. I'm really sorry for that, but the only alternative I had was not releasing anything at all, this thing has really upset me. |
|
17 June 2021, 09:51 | #174 |
Registered User
Join Date: Mar 2012
Location: Norfolk, UK
Posts: 1,157
|
The jailbars are caused by the /C1 signal on pin 15 of the 23-pin video port which is just left dangling and thus acts as a nice little antenna. Terminating that pin with a 47Ohm resistor to digital ground (pin 13's convenient) solves the issue.
|
17 June 2021, 10:24 | #175 |
Registered User
Join Date: Jun 2009
Location: Dublin, then Glasgow
Posts: 6,377
|
Vertical jailbars can be caused by several different things, but when the problem is specific to an LCD screen, in my experience it's most likely down to the sampling done on the signal by the monitor. Neither buffering nor grounding will help that - it's simply a mismatch between the horizontal resolution and timing the monitor expects and that which the Amiga outputs.
Some monitors have a phase adjustment which can help this situation - if you adjust the phase and the jailbars shift significantly and independently of the graphics, then this is the cause. If the jailbars stay in sync with the graphics when you adjust the phase, then look elsewhere for the cause. |
17 June 2021, 11:03 | #176 | |
Registered User
Join Date: Mar 2012
Location: Norfolk, UK
Posts: 1,157
|
Quote:
How can you make the Amiga's video output cleaner? The single most effective way is to tie off that open unterminated clock signal on the video port. I did this on my A500's DB23-VGA adapter a few weeks ago and the jailbars are quite simply not there any more (at least in solid areas - obviously you can't eliminate pixel clock interference patterns unless your monitor's phase/pixel-clock settings are flexible enough to achieve a perfect sync.) |
|
17 June 2021, 11:26 | #177 |
Registered User
Join Date: Jun 2009
Location: Dublin, then Glasgow
Posts: 6,377
|
Indeed, which is why I said they can be caused by several different things. we don't know the exact nature of the jailbars mentioned, and IMHO it's prudent to investigate and potentially eliminate simple causes before taking a soldering iron out.
|
17 June 2021, 11:45 | #178 |
Registered User
Join Date: Mar 2012
Location: Norfolk, UK
Posts: 1,157
|
Fair enough - and I'd always advocate modifying the DB23 to VGA adapter rather than the Amiga itself, in case that wasn't obvious.
|
17 June 2021, 21:06 | #179 | |
Registered User
Join Date: Aug 2014
Location: Netherlands
Posts: 699
|
Quote:
EDIT: The A3000 only has it very slightly over the DB15 connector, both in normal and scandoubled mode. Gonna try terminating the clock this weekend! Last edited by Mathesar; 17 June 2021 at 21:45. |
|
17 June 2021, 21:13 | #180 | |
Registered User
Join Date: Aug 2014
Location: Netherlands
Posts: 699
|
Quote:
This would be a cool winter project to build a new A500 motherboard! Again, great work! |
|
Currently Active Users Viewing This Thread: 1 (0 members and 1 guests) | |
Thread Tools | |
Similar Threads | ||||
Thread | Thread Starter | Forum | Replies | Last Post |
sidecar ram, plus fast ram, chip ram behavior | kaluce | support.Hardware | 6 | 21 May 2019 17:38 |
A600 multi-upgrade (Chip RAM + Fast RAM + ROM + IDE2CF) | Astrofra | Hardware pics | 15 | 18 February 2014 21:27 |
A600 w/ 1MB Chip + 4MB Fast Ram = WHDLoad success rate? | Kenan | support.Hardware | 7 | 08 May 2013 18:14 |
More Hardware for Zetro - A600 8mb fast ram ! (with love from Russia) | coze | Hardware mods | 137 | 21 October 2009 22:54 |
WTB A500 Fast Ram Expansions | mfletcher | MarketPlace | 2 | 05 July 2008 13:08 |
|
|