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Old 20 November 2021, 04:08   #1
Muzza
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CPU Caches

The other day, Ross had pointed out a problem in my cache flushing code which I fixed, and I was hopeful it could fix some compatibility issues some systems had. But then dlfrsilver reported some problems with my game on his A1200 with an A1230. Setting nocache on the CLI fixed it.

I load chunks of code from disk, both from the bootblock, and for each level (and dlfrsilver was only getting a problem on the 3rd level). After loading the code I do some relocation work on it, then I flush the cache using the below code (originally from SolidGold I believe), before jumping into it.

Code:
Supervisor    equ    -30

         move.l        EXECBASE,a6
        btst        #AFB_68020,AttnFlags+1(a6)
        beq            .skipFlushCache
        lea            flushCaches(pc),a5
        jsr            Supervisor(a6)
    .skipFlushCache:

flushCaches:
    mc68020
    movec    cacr,d0
    tst.w    d0
    bmi    .1            ; 68040/68060 I-Cache enabled?

    ; clear 68020/68030 caches
    or.w    #$808,d0
    movec    d0,cacr
    rte

    mc68040
    ; clear 68040/68060 caches
.1:    nop
    cpusha    bc
    rte
My question is, is the above code correct? And what else could I be doing that may be incompatible with caches? Am I right in thinking the cache only affects Fast RAM? I don't do any self modifying code, so the only other thing I could think of that may be cache unfriendly would be things like inserting values into copper lists in Chip RAM.

Any experience with common cache gotchas would be appreciated as I'm not sure where to start looking currently. Thanks
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Old 20 November 2021, 09:25   #2
Thomas Richter
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My question is, is the above code correct?
No. To clear the caches, call "CacheClearU()", an exec function, which takes care of all processors and cache types. You only need to do this if you modify code, or load data as code. The typical candidates such as starting a process or creating a task perform this already for you, thus it is unnecessary in many situations.
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Old 20 November 2021, 09:45   #3
ross
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... But then dlfrsilver reported some problems with my game on his A1200 with an A1230. Setting nocache on the CLI fixed it.
This is significant: if the cache flush code is the same why only a sub-level is affected?
Full deactivating the caches completely changes the cards! Hence a different previously hidden problem (a race condition) may not happen.
I would also investigate elsewhere.

EDIT:
However if exec is valid and usable calling CacheClearU() is the right way, so you can get rid of any doubts on your code.
I would use direct control of the caches registers only after a complete system takeover.

Last edited by ross; 20 November 2021 at 10:06.
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Old 20 November 2021, 10:06   #4
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I wasn’t clear but yes this is all after a system takeover.
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Old 20 November 2021, 14:21   #5
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Maybe you cannot even call Supervisor() after a complete system takeover. At least it is not advisable. Or did you leave the OS structure intact?
BTW, CacheClearU() doesn't help when you intend to support Kickstart 1.x.
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Old 20 November 2021, 16:25   #6
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Kick 1.x will not work with any processor with caches that are "worth mentioning", i.e 68040 and up.
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Old 20 November 2021, 16:51   #7
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Code looks OK to me, I use a similar setup and it's been fine. Probably a problem elsewhere.
If you are killing the system (well, depends... are you also trashing it or just disabling via Disable()/$dff09a?), for utliity functions that need supervisor instructions you could consider using trap vectors.
If calling Supervisor() is safe then calling CacheClearU() is also safe, and should be a preferred option (2.0+), but as mentioned, you'd still have to handle 1.3 and 040+ manually.
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Old 20 November 2021, 17:39   #8
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I'd wager this question is for Muzza's excellent Turrican 2 AGA project, in which case Kickstart 1.3 is not really a problem to worry about.
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Old 20 November 2021, 21:21   #9
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If this is AGA version, then no kick 1.3. This is logical, only kick 3.0 or higher.
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Old 21 November 2021, 06:00   #10
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Thanks for the replies, I do a system takeover but keep the system intact. And given that this is for OS2.0+, it seems sensible to change to use CacheClearU.
I agree it is probably just revealing a problem elsewhere, so I'll continue to look into that.
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Old 22 November 2021, 07:11   #11
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After loading the code I do some relocation work on it
Why do you do this?
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Old 22 November 2021, 10:56   #12
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He mentioned that he has taken over the system. Probably he even uses some trackloader for the code. So you have to do relocation yourself to support different Fast RAM expansions. At least this is what I do in my games...
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Old 22 November 2021, 11:02   #13
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IF the game does not make use of extra computing power that accelerated machines have (i.e. pure 68000 speed is always enough) then you might be better off by turning caches off at startup, before the takeover.
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Old 22 November 2021, 22:19   #14
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He mentioned that he has taken over the system. Probably he even uses some trackloader for the code. So you have to do relocation yourself to support different Fast RAM expansions. At least this is what I do in my games...

Yes, three code modules with internal references and which make calls to other modules. They are loaded into dynamically allocated memory, so all the internal and external references need relocating to point to the correct locations depending on where they are in RAM and where the other modules are.
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Old 22 November 2021, 22:28   #15
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Originally Posted by meynaf View Post
IF the game does not make use of extra computing power that accelerated machines have (i.e. pure 68000 speed is always enough) then you might be better off by turning caches off at startup, before the takeover.

It targets 68020, so I'm assuming turning off cache would have negative affects there too.


I implemented the CacheClearU change, and spent a lot of time making some copper code robust (because transitioning between copper lists in between game levels was my number one suspect for a possible race condition).
Unfortunately the reports I've had back from some testers who were good enough to try it for me are that it now crashes on level 2.


Next possible culprit is the music. It uses the TFMX player, and given that I didn't write that code myself, but had to interface with it, and that it is interrupt heavy, maybe there is a some timing issue there. But I'm just guessing really.
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Old 22 November 2021, 23:49   #16
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For testing TFMX Pro player, you can disable music. But from my memory TFMX Pro player has no problem to works on fastest CPU's on Amiga. Only TFMX 7V player (Turrican 2 intro/outro) uses SMC in mixing routine.
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Old 23 November 2021, 04:20   #17
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For testing TFMX Pro player, you can disable music. But from my memory TFMX Pro player has no problem to works on fastest CPU's on Amiga. Only TFMX 7V player (Turrican 2 intro/outro) uses SMC in mixing routine.

Useful to know thanks.
I use both players in my code, but the 7V one is not activated in the current build, because like you say, it's only for the intro.
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Old 24 November 2021, 23:14   #18
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Disabling all audio makes no difference. I've tried various WinUAE settings to make it run faster trying to reproduce a race condition, but nothing. Very frustrating.
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Old 24 November 2021, 23:58   #19
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Maybe this is simply code bug? Reading random value from Amiga memory or writing data in bad place?
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Old 25 November 2021, 00:07   #20
Muzza
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Maybe this is simply code bug? Reading random value from Amiga memory or writing data in bad place?

It is quite possible. I already do things like putting guards around all memory allocations in debug mode (to check for write overflows). Plus the code runs on PC too which would detect many common trashing bugs (apart from any in Amiga specific code of course).

Last edited by Muzza; 25 November 2021 at 00:14.
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