Quote:
Originally Posted by Asman
I have question about CHIP memory. Lets consider A500 with 0.5 MB CHIP ( $00000 - $07ffff ). What happens when I'm trying to read from $80000 or higher ? Is there kind of mirroring of the CHIP memory in such case ?
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Chip RAM mirrors up to 2M. That is not exactly undocumented because it is "documented" in schematics
(It gets a bit more complex with A500+ in 1.5M chip configuration)
Fun part: 1M Agnus in 512k+512k configuration still sees 1M of Chip RAM internally. First 512k at normal Chip RAM region, second 512k is at normal slow ram region ($c00000-$c7ffff). For example bitplane DMA pointer $090000 is actually CPU address $c10000.
Quite useless information unless you want to write demo that requires 1M chip but also works in 512k+512k ECS Agnus A500s
