Resurrecting this thread in search of information.
What I'm looking for is the workings of the blitter in line mode, for emulation purposes.
The problem is, in line mode, the blitter reads/writes the same words multiple times, for each pixel, and is supposed to take 4 blitter cycles per pixel. The 'normal mode' A-CD blit takes 3 per word.
Existing emulators, plus the minimig, just "make it take" 4 cycles per pixel for lines, but I'm looking for how it really works, pipelining and all.
I consider the normal-mode A-CD cycle sequence something like this:
Code:
A-CD:
A0R C0R --- A1R C1R D0W A2R C2R D1W A3R C3R D2W --- D3W
A0S D0M --- A1S D1M --- A2S D2M --- A3S D3M
R = read, W = write, S = shift, M = minterm
(I'm assuming here that there's an upper and a lower part of the pipeline, and every blitter cycle can execute one of each. DMA (R/W) is upper, and shift/minterm (S/M) is lower, I may be wrong)
This doesn't cut it for line drawing, since C is read before D is written, so the last pixel written does not appear in the newly read C (plus, spec says 4 cycles per pixel).
The B channel is still shifted in line mode, so an extra "lower" blitter cycle can be inserted (and upper have to get an empty cycle to follow), but it still does not provide for enough room to write D before C is read.
Is there any deeper knowledge of line-drawing cycle sequence?