Quote:
Originally Posted by grelbfarlk
I agree with everything you've said, a common off the shelf board would lower prices and have a common piece of hardware to swap out if you suspected you had problems with your board. I wonder what possibly could be the motivation of building something very similar and compatible to a cheap, easily attainable, off the shelf board and selling it for 3-4 times as much. I realize low volumes=higher prices and having professional assembly also costs more, those are all arguments for using a COTS board.
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There are both advantages and disadvantages of a off the shelf board.
+ cost
- the board is probably not exactly what is wanted
- the board could be changed or discontinued at any time
Quote:
Originally Posted by grelbfarlk
Last I heard about two years ago the original board (an Arrow Be Micro(?) )they were basing the V500 off of worked, but Chris just hadn't gotten the memory controller working. At which point the idea of a common off the shelf board evaporated as Majsta had finished building his initial prototypes.
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Yes. The Sandwich accelerator original plan was to use an Arrow BeMicro CV board. It would be better if 2 boards were not needed but the Arrow board and most off the shelf FPGA boards do not have HDMI.
There is a FPGA board which does have HDMI. The Turtle board is meant to be an FPGA version of the Raspberry Pi.
http://www.cnx-software.com/2017/03/...uperh-sh2-soc/
It may be better suited as a FPGA Arcade upgrade as it uses a Xilinx FPGA but it would technically be possible to put an Apollo Core in it. They created their own board to get a larger FPGA for the open core (SuperH) J-Core CPU project. The SuperH was a simplified hybrid RISC derivative of the 68k developed by Hitachi after they licensed (and produced) the 68000 from Motorola (there was a license dispute). The patents are expiring for SuperH much as they did for the 68k CPU so they are using the ISA for a open core. The guy behind the project is Jeff Dionne who is the uClinux co-creator which began for a CPU32. He is a 68k fan which is part of the reason why he chose the SuperH (also because of code density even though I tried to show him how much the 68k can beat SuperH). He is making various versions which he hopes will scale for embedded applications. These guys try to abstract the current FPGA details and have tools which automatically prepare for an ASIC of which they plan on doing several. It's pretty much the opposite philosophy of a certain other FPGA core which is designed for FPGA only. Another missed opportunity for the 68k and Amiga. RIP.