English Amiga Board - View Single Post - PTPlayer / Vertical Blank Interrupt / 060

a/b · 05 April 2022, 19:21

OK, to make it simple to understand... If data bus is e.g. 32-bit then the cpu always reads in 32-bit chunks and from 32-bit aligned addresses (0, 4, 8, 12, ...).
If you read a byte from address 5 (data at 5), it will read 32-bits from 4-7 and discard unwanted bits.
If you read a word from address 5 (data at 5-6), it will read 32-bits from 4-7 and discard unwanted bits.
If you read a longword from address 5 (data at 5-8), it will read 32-bits from 4-7, 32-bits from 8-11, combine those two and discard unwanted bits. And that takes extra time.
Additionally, older 68000/010 can't handle combining, and since they have a 16-bit bus a (long)word access to any odd memory address will cause an exception. So at the very least you want (long)word data to be 16-bit aligned (at even addresses). And if you aim at 68020 as minumum, you ideally want longwords to be 32-bit aligned.

05 April 2022, 19:21	#39
a/b Registered User Join Date: Jun 2016 Location: europe Posts: 1,039	OK, to make it simple to understand... If data bus is e.g. 32-bit then the cpu always reads in 32-bit chunks and from 32-bit aligned addresses (0, 4, 8, 12, ...). If you read a byte from address 5 (data at 5), it will read 32-bits from 4-7 and discard unwanted bits. If you read a word from address 5 (data at 5-6), it will read 32-bits from 4-7 and discard unwanted bits. If you read a longword from address 5 (data at 5-8), it will read 32-bits from 4-7, 32-bits from 8-11, combine those two and discard unwanted bits. And that takes extra time. Additionally, older 68000/010 can't handle combining, and since they have a 16-bit bus a (long)word access to any odd memory address will cause an exception. So at the very least you want (long)word data to be 16-bit aligned (at even addresses). And if you aim at 68020 as minumum, you ideally want longwords to be 32-bit aligned.