Quote:
Originally Posted by remz
[Edit]: Pondering about it, maybe I am thinking of the Copper too much like a general CPU: Maybe the way it works is more like:
- First Word - Decode: instruction is a Move To Custom Register At Address xxxx: prepare destination for copy
- Second Word - Value to Copy: Transfer Value directly into Destination:
This operation is apparently special and unique to Copper because it allows direct copy of a Word from chip ram unto a custom Register in just one single dma cycle. CPU cannot do that, nor Blitter (Blitter cannot because custom registers are out of range).
Could that make more sense?
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It’s just occurred to me that you might not have written a copper list before (I used to struggle with them back in the day).
If the first instruction word is a valid Chip register address then the copper just loads the second instruction word value directly into that valid register address. That’s your 2 cycles, it really is that simple.
If the first instruction word is an odd value (all Chip registers are even), then the second instruction word is used to establish if the copper is going to wait or skip at a certain beam position (the first instruction word is then treated as a bit mask for the position).
-Edit- Also remember that the copper only has bus access on odd cycles, so each move operation takes at least 4 cycles!