English Amiga Board - View Single Post - Creating a new 020 accel board for A600 (eventually to A500 too)

Shadowfire · 22 August 2009, 20:44

Disclaimers: My assessments are based on my observations and timings. The system I am using to test is a standard 68000 based system. My IDE controller was designed with this kind of system in mind, and may not (in fact, probably won't, although that has yet to be determined) scale well with faster processors. 500k/sec isn't a bad transfer rate at all, considering the speed of the processor and OS & I/O overhead.

68000 best case transfer rate scenario: infinite loop as such

Code:

.. move.l (a0)+,(a1)+
   dbra d0,..

1 transfer to fetch move instruction, 2 transfers to read words, 2 transfer to write words
1 transfer to fetch loop instruction

@ 7.1mhz, 4 cycles per mem transfer, 6 mem transfers per iteration, this is a max of approximately 295,833 iterations/sec, each of which transfers 4 bytes, or 1,183,333 bytes a second... if the only thing it is doing is the memory transfer. Of course, the 68000 has to service interrupts, parse I/O requests & reply to messages, transfer parameters to and from hardware, etc.

This timing suggests that the Supra drive is copying data via the cpu, but actual SCSI I/O operations are handled by some sort of SCSI processor. You wouldn't want to know how slow this would be if the 68000 was doing the SCSI handshaking

Fun side note: Bus master DMA, hogging the bus, 7.1mhz / 4 cycles per memory transfer * 2 bytes/transfer = 3.5MB/sec maximum.

22 August 2009, 20:44	#433
Shadowfire Registered User Join Date: Aug 2001 Location: Connecticut USA Posts: 617	Disclaimers: My assessments are based on my observations and timings. The system I am using to test is a standard 68000 based system. My IDE controller was designed with this kind of system in mind, and may not (in fact, probably won't, although that has yet to be determined) scale well with faster processors. 500k/sec isn't a bad transfer rate at all, considering the speed of the processor and OS & I/O overhead. 68000 best case transfer rate scenario: infinite loop as such Code: .. move.l (a0)+,(a1)+ dbra d0,.. 1 transfer to fetch move instruction, 2 transfers to read words, 2 transfer to write words 1 transfer to fetch loop instruction @ 7.1mhz, 4 cycles per mem transfer, 6 mem transfers per iteration, this is a max of approximately 295,833 iterations/sec, each of which transfers 4 bytes, or 1,183,333 bytes a second... if the only thing it is doing is the memory transfer. Of course, the 68000 has to service interrupts, parse I/O requests & reply to messages, transfer parameters to and from hardware, etc. This timing suggests that the Supra drive is copying data via the cpu, but actual SCSI I/O operations are handled by some sort of SCSI processor. You wouldn't want to know how slow this would be if the 68000 was doing the SCSI handshaking Fun side note: Bus master DMA, hogging the bus, 7.1mhz / 4 cycles per memory transfer * 2 bytes/transfer = 3.5MB/sec maximum. Last edited by Shadowfire; 22 August 2009 at 21:15.