Ok, all the pieces are in place now, Toni and I have finished torturing a couple of Denises but we have understood how the STROBE management works internally.
Nothing sensational compared to what I have already described previously, just how it is technically implemented (so I don't edit the previous messages, it's not worth the effort and they are broadly correct).
As usual, the designers have adopted the policy of the cheapest and with less gates way, even at the cost of having some small side effects.
An example is the method used to solve the problem I mentioned in message
https://eab.abime.net/showpost.php?p...&postcount=331
To avoid a 'match value' they simply used the cycle immediately following $1C7(+2).. i.e... the STROBE itself
This has a couple of side effects that explain the 'different' vblank (as I correctly remembered) that can be noticed on the A1000 (and which was 'cloned' into OCS).
I don't know in which way this is related to lack of counter reset, but it's not important and it doesn't change anything on a practical level (except a rare bug regarding the DIW, well known by those who patch OCS stuff to work on ECS..); probably they saved two transistors and that was enough of a justification
.
Very quick summary diagram:
STREQU = enable master_blank (immediate)
STRVBL = reset counter, /BURST, latch enabled for dHB matches
STRHOR = reset counter, /BURST, latch enabled for dHB matches, clear master_blank (immediate)
STRLONG = LOL delay (reset at STROBE)
Operative description:
- STREQU is immediate BLANK for OCS Denise (this explain the last line blank that start early), enable master_blank
- line0 does not emit STRHOR in OCS Denise (this generate the 'ugly' extreme bottom line, shorter than normal and containing only COLOR00 like the $137SHF/$138LOF PAL
- STRHOR enable and disable blank at match positions, enable timed burst, and also immediately disable master_blank
- STRVBL is a 'reduced' version of STRHOR (it probably shares most of the gates but with one difference: it doesn't touch master_blank)
- master_blank always wins and need to be disabled if you want to re-enable view (only STRHOR can do it)
- STRLONG should be really set in a specific 'range' to be really usefull else it is 'reset' by strobes (the 'range' is after a STROBE and before dHBs)
The side effect of this setting is that at the last line of the BLANK there is a small window open for DIW (because STRHOR immediately deactivates the master_blank and then reactivates it for dHBs matches).
Of course this 'little window' can also contain normal video data
The funny thing is that STRVBL, which could be understood as the most significant signal for vertical BLANK actually does nothing for vertical blank!
Fortunately on normal NTSC/PAL screens the sequence is always STREQU->STRVBL->STRHOR and everything works fine anyway
If anyone is wondering: yes, in ECS Denise they fixed STRVBL and now it actually does something sensible.
But that's another story...
