Quote:
Originally Posted by remz
Exactly when is AUDxLC being read?
|
1. When the audio DMA is activated and the first word has to be fetched.
2. After playing the last byte (length counter has hit 0) and then after the period counter has hit 0 (or: when the audio DMA is used to fetch the next word and you are at the end).
Also, audio hw will check its DMA state only when it has to fetch, so a too quick disable + re-enable would most likely go unnoticed.
Safe way:
- disable audio DMA (makes your writes atomic, among other things)
- write pointer, length, and other stuff as needed
- wait maximum* amount of time so that audio hw detects it's been disabled
- enable audio DMA
* This depends on the highest period value you are using, the period counter must hit 0 before you re-enable DMA so that the hw catches up. One option could be to set the period to 1 right after disabling the audio DMA, to speed it up. Period change is applied (copied to the internal period counter register) immediately IIRC, someone will surely correct me if I'm wrong about this one.
Might be hard to decipher everything:
http://amigadev.elowar.com/read/ADCD.../node02DC.html