Quote:
Originally Posted by Matt_H
With the current supply situation, most 060 chips now circulating are the versions without an embedded FPU. Does it make any sense for accelerator designers to create a board with an LC060 and a separate 68882 chip?
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No, it doesn't. The 68060 (or 68LC060) does not have a coprocessor interface. Thus, you would have to manually interface with the 68882, using it as an I/O chip, and would to implement the coprocessor interface in software. This also rules out using FPU instructions, unless someone writes an exception handler that would then forward the instructions manually to the FPU.
Frankly, this doesn't make much sense. There were FPU add-onn cards which provided a mathieee.resource, which then implemented this interface, and the Os math libraries had support for this resource, but all of this was removed from the Os simply because the software interface was slow, actually slower than implementing the FPU operations in software in first place instead of emulating an FPU.
Thus, rather live with the mathieee-libraries, which would likely be faster than a software-defined manual I/O towards an external, non-integrated FPU.