https://download.abime.net/winuae/fi...uae_4900b40.7z
https://download.abime.net/winuae/fi...e64_4900b40.7z
Beta 40 (RC1):
- A2065 emulation quit/reset crash fix, A2065 RAM was freed too early, when it was still possible to receive new ethernet frames.
- Blitter final D write does not happen if D channel gets disabled, line mode gets enabled or new blit starts before pending D write has finished. This mainly affects copper blitter wait bug behavior, if new blit is setup before blitter gets its last cycle, last D write never happens which can prevent the glitch from happening. (Last write getting skipped might not cause any visible glitches) Fixes Andy & Blondie / Finity second to last part's glitch. Note that final part has many glitches, happens also on real A500 if system does not have any real Fast RAM.
- Log warning message if BLTDPTx is written to while blitter final D write is still pending.
- Removed wrong INTENA write optimization. Fixes Expiration / Mayhem cube corruption. (Problem wasn't directly blitter related)
- If programmed mode was in use that didn't require configured VSSTRT/VSSTOP registers, display was blank. (Contactro / Illusion)
- Screen mode with even horizontal cycle length (programmed and normal NTSC mode) copper timing fix. Copper can use cycle 0 (previously incorrectly calculated as cycle $e0) if previous line's last cycle was odd cycle (even total length). (Contactro / Illusion)
- Programmed mode registers are again zeroed at startup (was all ones) because JtxRules / Illusion only sets VBSTOP and HBSTOP and expects zeroed HBSTRT and VBSTRT. (Programmed mode comparators don't have reset line connected but they still power up with zeroed contents. At least usually..)
This update fixes remaining chipset related issues in my "should be fixed before official release" list.